We all know the story: ASIC starts are falling as the costs of the design tools, the mask sets and the manufacturing process are all going through the roof. Don’t even think about starting an ASIC design unless your budget is measured in millions of dollars. The development process is going to require a large team of engineers. The only way you can make money with an ASIC is to sell many hundreds of thousands of devices, and that normally implies consumer markets. But ASICs take months to years of development – a development cycle that can be longer than the product life of a consumer product, which is typically measured only in months.

But over the last few weeks, I have been talking to people who will happily talk about ASICs that cost only tens of thousands of dollars to design and begin to manufacture, and have a return on investment measured in months.  How come there is such a huge difference?

Let’s start with why you might want an ASIC. It could be that, of the many functions that you are carrying in a microcontroller, you feel you can speed some up by moving them to hardware, or you feel you need to add new interfaces. You may have several individual devices on a board and you want to improve speed and reliability or reduce Bill of Materials costs, or you may want to create a smaller footprint. By pulling the functions of multiple devices into a single ASIC, you could achieve these things.

To take a specific example: you are part of the small electronics team in a company making consumer white goods (washing machines, refrigerators etc). The control system for a washing machine is a microcontroller and some peripherals on a small pcb. The peripheral chips are often Analog Mixed Signal (AMS) devices interfacing the microcontroller to sensors and controls – for example, sensing water temperature and turning on or off a heater. Your boss decides that she wants to add wireless connectivity so that the washing machine can be controlled and monitored from a smart phone. You don’t know much about wireless, and, although there are devices you could add to your pcb, you are already pushing the space budget on your board. If you use a bigger board, the overall machine design would need some changes for it to fit – not a cheap task. Your volumes are going to be measured in thousands rather than millions, and you need to retain the microcontroller capability to allow you to produce variant models though software.

This process is going to be repeated many times over as the rise of the Internet of Things (IoT) is going to add communication to many currently stand-alone devices and as new devices will be created specifically for the IoT by companies not normally thought of as electronics designers.

One way to resolve the problem is to put all the separate devices into an ASIC. The first thing to realise is that you don’t need to go to the bleeding edge of process technology. For a start, you are, by definition, going to have sections of AMS, which pull you back at least one or more process nodes. But there are good reasons for going to a process no more advanced than 180 nanometres. As this is a very mature process, there are vast quantities of proven IP, both analog and digital. The ARM Cortex-M0 processor is optimised for 180 and gives you full 32-bit capability in only 12,000 gates, potentially leaving acres of space on the chip for the other functions. Manufacturing capacity at this level is widely available. The process technologies are now rock solid, and, as the manufacturing equipment has already more than paid for itself, foundries are offering very competitive pricing to keep their fabs loaded.

For the same reasons, the mask makers are also very competitive at this node, and you don’t have to cope with issues of multiple patterning and its related mask costs at 180. A cheaper road may be to not have your own mask set, at least initially, and to go instead for a space on a multi-project wafer (MPW) where a consolidator, such as MOSIS, puts multiple devices onto a single mask set, to run in one of the leading foundries. Depending on your needs, you might just prototype your device or move into low volume production runs. In Europe, Europractice, as well as supporting universities, also offers MPW services to industry, coordinated through IMEC in Belgium and the Fraunhofer Institute.

But you still have the issue of designing the device. One route would be to buy lower-priced tools. Tanner EDA has a suite of tools that provide much of the capability of the big names for a fraction of the cost. As their European distributer, Paul Double of EDA Solutions, explained, “At the smaller process nodes, the problems of designing are much more complex.” For example, timing at 25 nano is not just a matter of gate delays; even the length of the interconnect wires have to be taken into account. There are considerably fewer gates on the chip at the older nodes. This allows Tanner to support the older nodes with simpler, and less expensive, tools.

But you don’t need to do the design yourself. There are contractors you could hire who can supply the skills you don’t have in-house. Or, alternatively, you could use a specialist design company. One I spoke to was the S3 Group in Cork, Ireland. Like many of the other companies, they try to be as flexible as you need, starting from helping you turn the idea of “Something like this with a bit of communication added” into a detailed technical specification, and then going on to give advice and help in choosing IP, carrying out the design – including creating the test programme – selecting a foundry or MPW, and even providing help with test and assembly. Using such a company simplifies your task, and you are benefiting from their experience on many other projects, but it does, of course, add to your costs. The trade-off is relatively simple: are you confident enough in your in-house skills to do all these tasks, or are you prepared to pay for someone else’s skills?

Then there are the players in this field who take over the entire project, in effect taking in the design and delivering your volume chips. You don’t have to worry about how the chips get from the foundry to the assembly contractor and then from them to you. The Europractice partners offer consulting on this, and commercial companies with whom I have had contact include e-Silicon, Swindon Silicon Systems, and Open Silicon, all of whom offer slightly different services at a wide range of process nodes.

Now, of course, I hear you say, what about a Field Programmable Device, perhaps the Xilinx Zynq or Altera’s SoC families? These come with hard ARM cores and areas of programmability, backed by a mass of IP. Why mess around with foundries, packaging companies and all that stuff?

AMS is one reason. Xilinx has some resources, mainly analog-to-digital convertors. If you can get by with this, then it might be helpful, but there are other issues. These devices are expensive for anything above relatively low volumes, they are physically quite big, and you are restricted in your packaging. If you are working on a device for the IoT, you almost certainly don’t want the size of packaging and the number of pins that are intrinsic to even the smallest of these devices. And of course you want the minimum of power consumption

It does look as though you can now seriously consider an ASIC for even quite small quantities. The recipe is simple. Take an ARM Cortex core, with its massive eco-system of development tools and software, add a mix of peripherals made from proven IP, stir with carefully chosen partners, and you have your very own ASIC- just ready for IoT and a range of other activities.