FPGAs are power-hungry monsters, right? We all learned this ten years ago, and un-learning it sometimes seems beyond the capabilities of the electronic design community. We plod along with our pre-conceptions, patiently ignoring the evolving reality. In truth, low-power FPGAs have been available for years now. Depending on your application, you can find a programmable logic device that fits just about any power budget. Ask the average designer on the street, though, and you’ll usually get the same response: “We couldn’t use an FPGA in our design because, you know, they’re power hogs.”
Altera, Linear Technology, and Arrow Electronics set out to change that perception recently with the introduction of a new development board – dubbed the Low Power Reference Platform (LPRP). The collaboration between these companies makes this development board an interesting case study in blending objectives of changing market perceptions, selling chips, and providing a robust tool to facilitate product prototyping and development.
When you open the LPRP box and pop out the development board, you’ll notice one thing right away – a battery strapped to the bottom. Next, almost like an engineer’s magic trick, you can power up the board and run through a series of demo designs with no cables connected whatsoever. Are they making the point yet? It’s an FPGA board. It runs on a battery. You can listen to your favorite MP3 tunes (OK, probably not your actual favorites, but a nice collection of material that they apparently could get rights to distribute) while a power display on the tiny LCD monitors the milliwatts for you in real time. Not convinced? Hook up a multi-meter to the proper resistor and you can get a verifiable second opinion. Or, just measure how long until the battery goes dead.
The centerpiece of the development board (not counting the battery, of course) is the Altera Cyclone III device. The board also includes a USB interface, an SD flash slot (with a 1-gig card installed) and a Linear Technology LTC3455 power management chip. With the demo designs that come pre-installed, you can navigate around on the menu and try out the power-saving modes on the Cyclone III FPGA mounted on the board. The Cyclone device has standby and hibernate modes that operate much like the similarly-named modes on your laptop. Standby mode, used for shorter down-time cycles, cuts about two-thirds of the power drain on the FPGA. Hibernate mode shuts down the device almost completely, eliminating over 98% of the current draw.
More importantly, dynamic power is greatly improved with the current (65nm) generation FPGAs, while the boogeyman of static power has been held at bay for another process node. Altera claims that the largest Cyclone III device (ECP3C120) consumes less than 600mw at 20MHz and less than 2 watts at 100MHz. That means you won’t be burning through batteries too badly even during the times the device is in active mode – as you can see in the LPRP when the Cyclone is hosting a soft-core processor (Altera’s NIOS II) playing MP3s from an SD card while the whole board is operating at less than .5W.
Because the LPRP demo designs utilize the Altera NIOS II soft-core 32-bit RISC processor, the kit also makes the point that you can do system-on-chip design with a battery-powered FPGA, proving that low power doesn’t automatically put you into CPLD-class devices. The Cyclone III performs admirably in these real-world-ish demo applications, showing that it is completely realistic to make an FPGA-centric system-on-chip application for the battery-powered market.
The Linear Technologies LTC3455 is also a nice discovery for those of us coming from the FPGA world, who aren’t accustomed to designing battery-powered appliances. The LTC3455 is designed to take all the worry (and design effort) out of the typical “PC-pal” peripheral that can run on batteries, USB power, or with a wall adapter. The 3455 detects what power is currently available in each case and automatically does the “right thing.” When only battery power is available, the device pulls power from there. When USB power is present, the device powers the system from that source, and dedicates leftover current to recharging the battery. Wall adapter power trumps all these and the device will switch to run the system and charge the batteries from the wall power source. All of these modes can be easily demonstrated with the LPRP board (except wall power, because the kit doesn’t include a wall adapter.)
Developing systems for low power requires a lot more than just power-friendly parts. Every application has its own peculiarities, and smart design for power consumption usually involves capitalizing on the subtle properties of those design-specific features. Knowing when clock frequencies can be reduced, when parts of the circuit can be powered down, when displays can be dimmed or blacked out, and other coarse-grained power tricks are just part of the picture. In creating an FPGA design for power efficiency, you need to have a way to understand where the power is going in the first place. Altera uses the LPRP as an opportunity to showcase their robust set of power analysis and optimization tools: their PowerPlay power analysis suite and the additional power optimization capabilities built into the company’s Quartus II design software.
Arrow claims that the LPRP is designed to be a full-fledged development system and not just a proof-of-product platform. They expect that many designers will use the development board as their primary development and prototyping vehicle for development of low-power Cyclone III- based applications. Proving that there are other purposes at play, however, the introduction of the LPRP comes in conjunction with a workshop series that is now playing at 17 cities across the US. Attendees to the workshop get their own LPRP to take home, reference designs and documentation, and the opportunity to go through a series of low-power design labs with technical experts from the participating companies. With all that and lunch too, the workshop seems to be a pretty good value.
While the LPRP won’t be the be-all, end-all of development boards, it does a strong job of making the point that FPGAs are a viable platform for battery-powered applications. The combination of the development board with the examples and workshops should help to educate us in the design community on the new power-pinching possibilities that 65nm FPGAs bring to the party.
