When was the last time you disassembled the package of each FPGA in your design to make sure the bonding is secure? Would your design criteria be different if shipping your device to its destination cost $13,000.00 per pound? What if your FPGA was in an environment where the radiation levels made random upsets of memory elements more the rule than the exception? If your device were operating in a vacuum, how would you think about heat dissipation? Would you work or think differently if an error in your design could result in loss of life, or in property damage in the hundreds of millions of dollars?

Welcome to the world of programmable logic in space. While we may sometimes find it difficult to get our designs to behave the way we envision here on the ground, getting digital systems to perform well in space is another matter altogether. The environmental challenges, the cost of deployment, and the extreme risk of failure all conspire to create one of the most difficult problems faced by digital designers today.

Overall, programmable logic is a godsend for spacecraft electronics development. Building a system from ASSPs or standard parts is seldom an option, due to the limited availability of properly qualified devices, and also because the cost of putting the system into orbit puts integration at a premium. Space designs are never deployed in significant volume, so non-recurring engineering (NRE) costs dominate any ASIC or custom device project intended for space use. Additionally, an ASIC re-spin can cost weeks of schedule time, and slipping launch schedules can cause enormous cost overruns. FPGAs, with their zero NRE and relatively short design cycles, are economically superior at virtually any unit price. Reconfigurable programmable logic devices offer the added advantage of post-launch design modification that could make the difference between a working system and orbiting space junk.

There’s a lot more to getting your design into space than just strapping your development board to a bottle rocket, though. The list of problems faced by those designing systems to work a few miles up is long and distinguished. Heading up the list is radiation. Without the nice atmosphere to filter out most of those nasty particles and rays, your device will get hit by lots of them. Remember from your device physics classes how charge holds the state of memory elements? It turns out that a couple of well placed particles could quietly swap a few of your zeros and ones without your even noticing. For registers and memories, there are techniques such as cyclic redundancy checking (CRC) and triple module redundancy (TMR) that can mitigate the effects of random bit swaps.

Unfortunately, FPGAs are mostly just big RAM devices, and most of that RAM is in the configuration circuitry. An upset event in the routing can quietly alter the netlist, and a problem in a lookup table (LUT) can alter the functional behavior of a design. Radiation susceptibility is greatest in SRAM devices (which, unfortunately are also the champs in density and functionality). SRAM FPGA designs for high-radiation environments typically include some periodic configuration read-back and frequent re-configuration of the design to a known good state.

Because of this vulnerability, SRAM devices are found more regularly in “payload” applications, where some level of failure can be tolerated and overcome, instead of in the more critical “bus” systems that control spacecraft flight operations. Xilinx’s Virtex II QPro family, popular in space use, includes the same features as the regular Virtex II Pro (integrated Power PC core, integrated SERDES, etc.) and is adapted for space use with extended temperature ranges, extended radiation tolerance, and ceramic packages. SRAM vendors such as Xilinx improve the radiation tolerance with techniques such as imbalanced latches for configuration circuitry that make read efficiency better and state stability higher. Write efficiency is significantly less important than read efficiency in configuration elements, because configuration is done only once at startup.

More often than not, “bus” applications are implemented using specialized devices such as Actel’s RTFXS and RTAXS (Radiation Tolerant FX or AX architecture “Space” versions). These devices use metal-to-metal antifuse connections for configuration and include built-in TMR on all registers. Antifuse connections are immune to radiation events, and TMR on registers uses three memory elements with voting circuitry to assure the correct state for each bit. In addition to radiation tolerance, antifuse devices offer single-chip solutions with no configuration circuitry, relatively low power consumption, and high operating frequencies. In the negative column, they typically offer lower density than high-end SRAM devices, and they are not reconfigurable.

The extreme premium on reducing mass in space-bound electronics systems manifests itself in unexpected ways. Obviously devices/packages with smaller footprints use less board area, which reduces mass. Single-chip solutions don’t require extra devices and board real estate for configuration circuitry, also resulting in lower overall mass. Higher density devices can reduce overall chip count, eliminating mass and improving reliability. On the less obvious side, devices that consume less power require smaller, lighter power supplies and potentially less solar collector area to drive their portion of the power budget.

With no air to help cool your system, heat dissipation also plays by different rules. You can’t just bolt a bigger fan on your chassis or heap on a few heat sinks. Heat must be conducted through the physical connection with the board and is ultimately radiated into space. Since cooling is accomplished by thermal conduction, manufacturers need to provide data such as thermal conductance through the leads to the board. Ceramic packages are used almost exclusively because of higher thermal conductivity, and also because they afford better observability throughout manufacturing. Besides affecting package design, the heat problem puts additional emphasis on the necessity to design for low power. A design that consumes less power has less heat to dissipate.

While high-profile projects like the Mars rovers showcase the use of programmable logic in space, the majority of space-bound FPGAs are included in commercial and military satellites. “Almost every single commercial and military satellite that goes up has a significant number of Actel parts,” says Actel’s Ken O’Neill. “They are frequently used in satellite bus functions such as guidance, station-keeping, and telemetry.”

On the high-profile science side, Actel estimates that, among the various Mars programs in operation right now, there are at least 76 Actel FPGAs on or orbiting Mars this year. Xilinx claims that their devices are used in pyrotechnics for landing as well as in the arm, cameras, and wheel control systems on the Mars rover missions.

While Actel and Xilinx have the most visible space FPGA programs today, other vendors may not be too far behind in the space race. In particular, structured ASIC devices such as Altera’s HardCopy may be useful in the future for space applications as their smaller die size, lower power consumption, metal/mask programming and low NRE all seem attractive features, given the requirements of space design.

Within the space market, there continues to be an ever-increasing demand for logic integration. Satellites are doing more complicated functions, and scientific missions are doing increasingly difficult tasks with more budget pressure than ever before. Meeting these demands will require higher density, higher performance programmable logic devices suited to the rigors of the harsh space environment and tested to the standards demanded by such high-reliability applications.

Many of these requirements bleed over into the ground-based FPGA market as well. With 90nm devices, the need to manage power, particularly leakage-current-induced quiescent power, becomes essential for many applications other than those launched into orbit. High reliability systems on the ground that use large numbers of programmable logic gates and require long-term continuous operation need to consider radiation-induced errors even at ground level. So, the next time you talk to a designer of space-based electronics, don’t point and laugh too long. Many of the problems he’s struggling with today are likely to be among those you’ll be fighting tomorrow.