fish fry
Subscribe Now

Back to the Drawing Board

Intel's New Tablet, er... Laptop and a New Day for Lattice Semiconductor

In this week’s Fish Fry, my special guest is Lattice Semiconductor’s new CEO Darin Billerbeck who has some very interesting things to say about the FPGA market and Lattice’s cultural transformation. 

And, in keeping with the Lattice theme, you’ll want to jump into the competition for this week’s awesome nerdy giveaway – a Lattice ECP3 Versa Development Kit, and as usual you’ll need to tune in to find out how to win.

Also this week, I dig into the details of the new Intel Ultrabook unveiled at Computex and try to find out why the heck other folks are calling this thing a tablet.

If you like the idea of this new series be sure to drop a comment in the box below.

 

Watch Previous Fish Frys

Fish Fry Links – June 3, 2011

Kevin Morris’ article: Leading Lattice – Billerbeck Steers a Fresh Course

Texas Memory Systems

Lattice ECP3 Versa Development Kit 

10 thoughts on “Back to the Drawing Board”

  1. Pingback: homebasedbusiness
  2. Pingback: porno
  3. Pingback: kari satilir
  4. Pingback: Taruhan Bola
  5. Pingback: DMPK
  6. Pingback: sscn.bkn.go.id
  7. Pingback: coehuman.uodiyala

Leave a Reply

featured blogs
May 2, 2024
I'm envisioning what one of these pieces would look like on the wall of my office. It would look awesome!...
Apr 30, 2024
Analog IC design engineers need breakthrough technologies & chip design tools to solve modern challenges; learn more from our analog design panel at SNUG 2024.The post Why Analog Design Challenges Need Breakthrough Technologies appeared first on Chip Design....

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Achieve Greater Design Flexibility and Reduce Costs with Chiplets

Sponsored by Keysight

Chiplets are a new way to build a system-on-chips (SoCs) to improve yields and reduce costs. It partitions the chip into discrete elements and connects them with a standardized interface, enabling designers to meet performance, efficiency, power, size, and cost challenges in the 5 / 6G, artificial intelligence (AI), and virtual reality (VR) era. This white paper will discuss the shift to chiplet adoption and Keysight EDA's implementation of the communication standard (UCIe) into the Keysight Advanced Design System (ADS).

Dive into the technical details – download now.

featured chalk talk

Using the Vishay IHLE® to Mitigate Radiated EMI
Sponsored by Mouser Electronics and Vishay
EMI mitigation is an important design concern for a lot of different electronic systems designs. In this episode of Chalk Talk, Amelia Dalton and Tim Shafer from Vishay explore how Vishay’s IHLE power inductors can reduce radiated EMI. They also examine how the composition of these inductors can support the mitigation of EMI and how you can get started using Vishay’s IHLE® High Current Inductors in your next design.
Dec 4, 2023
20,976 views