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Coventor and Process Relations Collaborate to Streamline Fabrication Process Development

CARY, North Carolina and DORTMUND, Germany – September 29, 2010 – Coventor, Inc.(www.coventor.com), the leading supplier of software for developing micro-electromechanicalsystems (MEMS), and Process Relations, a provider of enterprise information management systemsfor high tech process development, announced today a collaboration to develop and marketintegrated solutions to improve the efficiency of developing next generation fabrication processesfor semiconductor and MEMS manufacturers. As part of the cooperation, the companies havedeveloped an interface between the Process Development Execution System XperiDeskTMinformation management system from Process Relations and Coventor’s 3D emulation softwareSEMulator3D™.

< … Read More → "Coventor and Process Relations Collaborate to Streamline Fabrication Process Development"

Sidense Exhibiting at SMIC 2010 Symposium

Ottawa, Canada and Santa Clara, Calif. – October 1, 2010

What: Sidense exhibiting at SMIC 2010 SymposiumBooth #2

Where: Santa Clara Convention Center5001 Great America ParkwaySanta Clara, California 95054

When: Oct. 8, 201012-5:30PM

Who: Jim Lipman, Sidense Marketing Director

For more information or to schedule a meeting with Sidense please contact:

Jim LipmanSidensejim@sidense.com925-606-1370

About Sidense:

Sidense Corp. provides secure, very dense and reliable non-volatile, one-timeprogrammable (OTP) memory IP for use in standard-logic CMOS processes withno … Read More → "Sidense Exhibiting at SMIC 2010 Symposium"

Atrato Joins Connect Program to Drive New Storage Services for High Bandwidth, Data-Intensive Applications

LOUISVILLE, Colo., Sept. 29 /PRNewswire/ — Atrato, Inc., a storage innovator specializing in high performance, autonomic tiered storage solutions, today announced it has joined the ng Connect Program, a multi-industry initiative driving the development of next-generation broadband services based on Long Term Evolution ( … Read More → "Atrato Joins Connect Program to Drive New Storage Services for High Bandwidth, Data-Intensive Applications"

Sunplus Reduces Design Cycle on High-Speed Multi-Million-Gate SoC Using Cadence Encounter Digital Implementation System

SAN JOSE, CA–(Marketwire – September 27, 2010) – Cadence Design Systems, Inc. (NASDAQ:CDNS), a leader in global electronic design innovation, today announced that Sunplus Technology Co., Ltd. (TAIEX: 2401) (LSE: SUPD), a leading multimedia IC design company, adopted the Cadence Encounter® Digital Implementation (EDI) System for its multimedia system-on-chip (SoC) designs.

“With EDI System, we achieved greater productivity and faster time to market for our area-critical, high-performance 65-nanometer designs,” said … Read More → "Sunplus Reduces Design Cycle on High-Speed Multi-Million-Gate SoC Using Cadence Encounter Digital Implementation System"

MoSys Participates at The Linley Group’s Tech Processor Conference

Who:         MoSys (NASDAQ: MOSY), a leading provider of serial chip-to-chip communications solutions that deliver unparalleled bandwidth performance for next generation networking systems and advanced system-on-chip (SoC) designs, is participating at The Linley Group’s Tech Processor Conference, which focuses on networking and communications. Michael Miller, Vice President of Technology Innovation and … Read More → "MoSys Participates at The Linley Group’s Tech Processor Conference"

Synopsys Enhances Synplify FPGA Synthesis Software With up to 4X Faster Runtime and New Team-Design Capabilities

2010.09 Release Highlights:

  • Up to 4X synthesis runtime improvement
  • New global placer for quality of results improvements on existing designs
  • New team-design feature for concurrent design development
  • New support for DesignWare Library datapath and building block components for FPGA Implementation and ASIC Prototyping

MOUNTAIN VIEW, Calif., Sept. 27 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of enhancements to its Synplify Pro® and … Read More → "Synopsys Enhances Synplify FPGA Synthesis Software With up to 4X Faster Runtime and New Team-Design Capabilities"

Procella Audio Joins D-Tools Manufacturer Vantage Point (MVP) Program

ATLANTA, GA., CEDIA EXPO, SEPTEMBER 23, 2010 – D-Tools, Inc., the worldwide leader in system integration software, today announced that Procella Audio, manufacturer of high-performance high-output speaker systems for home and professional cinema and music applications, has joined the D-Tools Manufacturer Vantage Point (MVP) program. 

Using pro audio components that include high-frequency compression drivers on custom-designed waveguides and based on a scalable concept that offers multiple system configurations, Procella systems assure listeners of the ability to achieve reference-level playback with uncompressed dynamics in any size room – up to and including 40 seat cinemas. Procella’s Identical Voice™ … Read More → "Procella Audio Joins D-Tools Manufacturer Vantage Point (MVP) Program"

Open-Silicon, MIPS Technologies, and Dolphin Technology Achieve ASIC CPU Performance of Over 2.4GHz in TSMC 40nm

MILPITAS, SUNNYVALE and SAN JOSE, Calif. – September 21, 2010: Open-Silicon, Inc., MIPS Technologies, Inc. (NASDAQ: MIPS), and Dolphin Technology today announced the successful tapeout of a high-performance ASIC processor at over 2.4GHz under typical conditions.  This achievement, as measured in timing closure against TSMC reference flow signoff conditions, will make this one of the highest frequency ASIC processors ever built, highlighting the companies’ industry-leading technologies for building high-performance processor-based systems.  This high-performance ASIC processor is a follow-on test chip to the 65nm, 1.1GHz test chip announced by Open-Silicon and MIPS Technologies at the end of last … Read More → "Open-Silicon, MIPS Technologies, and Dolphin Technology Achieve ASIC CPU Performance of Over 2.4GHz in TSMC 40nm"

LDRA Interface Maximizes Efficiency and Ease-of-Use

Embedded Systems Conference, Boston, MA. September 20, 2010LDRA, the leading provider of automated software verification tools, has released a newly revamped TBmanager, V8.4. TBmanager serves as a task-based interface to the LDRA tool suite, creating a common user experience among the LDRA modules. In addition to improving overall ease of use, TBmanager V8.4 accommodates regression suites, test scripts and testing of applications developed using multiple … Read More → "LDRA Interface Maximizes Efficiency and Ease-of-Use"

New Synopsys HSPICE Precision Parallel Technology Delivers Up to 7X Speed-up for Analog/Mixed-Signal Designs

MOUNTAIN VIEW, Calif.Sept. 20 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today unveiled new HSPICE® Precision Parallel (HPP) multi-threading technology that delivers up to 7X simulation speed-up for complex analog and mixed-signal designs. In addition to the new HPP technology, the HSPICE 2010 solution includes enhanced convergence algorithms, advanced analog analysis features and foundry-qualified support for process design kits (PDKs) that extend HSPICE gold-standard accuracy to the verification of complex circuits such as phase-locked loops, SERDES, data converters, … Read More → "New Synopsys HSPICE Precision Parallel Technology Delivers Up to 7X Speed-up for Analog/Mixed-Signal Designs"

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