EMBEDDED WORLD 2010, NUREMBERG, GERMANY, March 2, 2010 – Atmel® Corporation (Nasdaq: ATML), a leader in microcontroller and touch solutions, today announced several new microcontroller products, tools and platforms to enable an easier workflow for designers of consumer, industrial, white goods and smart energy applications.

Atmel understands that design engineers have many requirements to meet changing market and customer demands. By offering a variety of microcontroller solutions, Atmel simplifies design flows for our customer’s engineers without compromising features and benefits required to bring competitive products quickly to market. These solutions include:

A floating point unit (FPU) feature … Read More → "Atmel Microcontroller Solutions Ease Engineering Workflow"

Los Gatos, CA – March 1, 2010 – Silicon Frontline Technology, Inc. (SFT), an Electronic Design Automation (EDA) company in the post-layout verification market, announced today that Read More → "Triune Systems Picks Silicon Frontline Technology to Optimize Power Device Design, Reduce Carbon Footprint"

MOUNTAIN VIEW, Calif., March 3 /PRNewswire-FirstCall/ — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, today announced important new capabilities in its System Studio C/C++ model-based analysis and simulation environment, further enhancing algorithm developer efficiency. System Studio now offers matrix and vector data-type support, which significantly reduces the coding and debugging effort necessary to author signal processing simulation models. Furthermore, System Studio addresses the need for faster simulation runs by integrating highly efficient … Read More → "Synopsys System Studio Speeds DSP Algorithm Development With New Matrix Data-Type Support"

Newark, CA, February 24, 2010– nSys Design Systems, offering the world’s largest portfolio of Verification IPs, announced their 100/ 40G Ethernet nVS (nSys Verification Suite), which has been successfully deployed by industry leaders across Ethernet applications. 

Read More → "Networking & Storage Leaders Adopt 100/ 40GNetworking & Storage Leaders Adopt 100/ 40G Ethernet Verification IP from nSys"

Dresden, Germany – February 25, 2010 – Adaptive Network Solutions, a leading system design house, today announced the availability of @ANY Smart MAC Suite (SMS) IEEE802.15.4 software. @ANY SMS offers developers an easy control of @ANY 868/915 MHz and 2.4 GHz hardware platforms’ functionality via AT commands supporting all IEEE 802.15.4-based functions. Additionally, @ANY SMS facilitates the incorporation of numerous custom features, allowing developers an utmost flexibility.

“At Adaptive Network Solutions, we apply the same modular approach to both hardware and software design,” said Thomas Lerm, CEO of Adaptive Network Solutions GmbH. “The goal is to offer our clients easy-to-use, interoperable components that … Read More → "New IEEE802.15.4 MAC Software from Adaptive Network Solutions Offers Ultimate Flexibility to Developers"

SAN JOSE, Calif., Feb. 25, 2010 – Magma® Design Automation, Inc. (Nasdaq: LAVA), a provider of chip design software, announced today that PDF Solutions® Inc. (Nasdaq: PDFS), the leading provider of yield improvement technologies and services for the integrated circuit (IC) manufacturing process life cycle, selected the Titan™ … Read More → "PDF Solutions Selects Magma’s Titan to Improve Time to Yield of Mixed-Signal SoCs"

One of the goals of the JEOPARD project was a multicore-capable hard real-time Java Virtual Machine for high performance, real-time and safety critical applications. EADS Germany, GMV Portugal and Radio Labs Italy, are among the industrial partners in JEOPARD who are currently testing the completed Java VM with their actual applications. GMV Portugal is testing results on multicore systems using SYSGOs PikeOS partitioning operating system. The testing application consists of Java partitions in an aviation control system which are executed in parallel.

Read More → "JEOPARD Project begins validation of multicore-capable hard realtime Java Virtual Machine"

WHO:  The Open SystemC Initiative (OSCI), an independent, non-profit organization dedicated to supporting and advancing SystemC™ as an industry-standard language for electronic system-level (ESL) design, announced the annual European SystemC User Group (ESCUG) meeting.  Co-located with the Design, Automation & Test in Europe (DATE) Conference, the event is free to industry professionals and the media. In addition, a half-day SystemC AMS tutorial will be conducted for DATE attendees.

WHAT/WHEN:  Tutorial:  “Application of the SystemC AMS Standard,” will take place Monday, March 8, 09:30 – 13:00. The annual ESCUG … Read More → "European SystemC User Group (ESCUG) Meeting DATE 2010"

CHENGDU, China and SAN JOSE, Calif., Feb. 24, 2010 – Magma® Design Automation (Nasdaq: LAVA), a provider of chip design software, and Chengdu ICC (CDICC), a government-funded organization that promotes integrated circuit (IC) design in Chengdu, today announced the recent opening of a joint IC design lab. Established in the National IC Design Chengdu Industrial Base, one of seven technology incubation parks in China, the lab will provide local designers with access to Magma’s advanced analog and digital IC design software and comprehensive training programs.

Read More → "Magma and Chengdu ICC Establish Joint Lab to Foster Growth of Analog and Digital IC Design in Western China"

Kirkland, WA – 18 February, 2010 – Impulse Accelerated Technologies today announced a new FPGA hardware library supporting C-language math.h functions.

Unlike math.h functions that run “native” in embedded processors, the Impulse library is implemented directly in FPGA hardware, and supports refactoring into multiple, pipelined parallel processes. When used in this way, the math.h functions operate 2 – 10X faster than on embedded processors. And because they are callable from Impulse C, they are more accessible to software developers and others less … Read More → "Floating Point Math.h Functions Accelerated 2 – 10X on FPGA Hardware, with Impulse C High Level Synthesis Tools"