April 14 2010, Bath – SiliconSouthWest, the network for microelectronics in the SouthWest UK, has launched a test lab to help start-ups develop and evaluate their wireless hardware and network equipments designs.

The lab, housed in the Innovation Centre in Bath, is available to members of the Centre to avoid the need for high capital outlay early in the design … Read More → "SiliconSouthWest launches test lab in Bath with Focus on supporting start up companies"

MOUNTAIN VIEW, Calif. and SUNNYVALE, Calif., April 14 /PRNewswire-FirstCall/ — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, and eSilicon Corporation, the largest independent semiconductor Value Chain Producer (VCP), today announced that eSilicon has joined the Synopsys IP OEM Partner Program. eSilicon has had a successful history using DesignWare® IP which includes the completion of 200 designs with 100 percent first-pass silicon success utilizing Synopsys’ broad portfolio of high-quality IP solutions such as DesignWare Library, USB, … Read More → "eSilicon Joins Synopsys’ IP OEM Partner Program"

MOUNTAIN VIEW, Calif. – April 14, 2010 – Synopsys, Inc. (Nasdaq:SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that eSilicon and Brite Semiconductor have joined the Synopsys IP OEM Partner Program along with renewed members Global Unichip and Open-Silicon. Through the IP OEM Partner Program, members standardise on Synopsys’ broad portfolio of silicon-proven DesignWare(r) interface and analogue IP such as USB, PCI Express(r), DDR, HDMI, SATA, Ethernet, MIPI IP including 3GDigRF, CSI-2, D-PHY, data converters and audio codecs for their system-on-chip (SoC) designs.  By enabling member companies to access a … Read More → "Synopsys expands IP OEM Partner Program with two new members"

WOODCLIFF LAKE, N.J., April 13 — Semiconductor intellectual property (IP) provider CAST, Inc. now offers the only encoder core that supports both the Baseline (8-bit) and Extended Sequential (12-bit) modes of the JPEG image compression standard.

This plus a fast, compact design make the new JPEG-E-X IP core one of the best available lossy compression encoders for medical imaging, reconnaissance, and other applications where exceptional image detail is required.

Read More → "CAST Offers the First 12-bit JPEG Extended Sequential, DICOM-Compatible IP Core"

MOUNTAIN VIEW, Calif. – March 31, 2010 – Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that its DesignWare(R) SuperSpeed USB (USB 3.0) Solution including Controller and PHY IP  successfully passed the USB Implementers Forum (USB-IF) SuperSpeed USB certification. To achieve certification, the IP must pass protocol, electrical, and interoperability tests for SuperSpeed USB (USB 3.0, 5 Gbps) and Hi-Speed USB (USB 2.0, 480 Mbps). Synopsys created a fully integrated USB 3.0 IP solution, optimising all speed modes into a single USB 3.0 solution. This unique implementation enables designers to reduce area, pin count and power compared … Read More → "Synopsys’ DesignWare SuperSpeed USB 3.0 IP receives USB-IF certification"

MOUNTAIN VIEW, Calif., and SANTA CLARA, Calif., March 31, 2010 — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and SiliconBlue, a leader in ultra-low power, single-chip SRAM FPGAs, today announced that SiliconBlue has chosen Synopsys Synplify Pro® FPGA synthesis software as the synthesis tool of choice for its iCE65™ family of mobileFPGA™ devices.  SiliconBlue will distribute with its iCEcube™ software a version of the Synplify Pro software optimised for iCE65 devices. This version of the Synplify Pro software will have a thorough understanding … Read More → "SiliconBlue selects Synopsys as FPGA synthesis partner for its iCE65 mobileFPGA family"

CONCORD, CA. MARCH 30, 2010 – D-Tools, Inc., the worldwide leader in system integration software, today announced that AudioControl has renewed their D-Tools Manufacturer Vantage Point (MVP) program Partnership. AudioControl is a U.S. based designer and manufacturer of audio analyzers, signal processors and distributed audio products. AudioControl has recently had their whole product line updated, better enabling D-Tools System Integrator™ users to specify AudioControl high-end products to their end customers. 

During D-Tools inception year of 1998, AudioControl became known as D-Tools first partner and now over ten years later, … Read More → "D-Tools Enhances Manufacturer Vantage Point (MVP) Program with Legacy Partner, AudioControl"

SAN JOSE, Calif., March 30, 2010 – Cypress Semiconductor Corp. (Nasdaq: CY) today introduced a new online product selection tool for its powerful new PSoC^® 3 and PSoC 5 architectures. The Electronic Product Selector Guide, now available at Read More → "Cypress Introduces PSoC 3® and PSoC 5 Device Selection Tool To Help Designers Easily Customize the Perfect PSoC Solution"

MOUNTAIN VIEW, Calif., March 30, 2010 – Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that the Galaxy™ Implementation Platform has helped Infineon Technologies AG (NYSE: IFX) achieve first-pass silicon success of the 40-nanometer (nm) baseband processor for its X-GOLD™ 626 3G wireless analogue and digital system-in-package (SIP). Infineon utilised the Galaxy platform’s powerful implementation flow to optimise the chip’s multiple functional modes with multi-corner/multi-mode (MCMM) technology, taking advantage of the links between Synopsys’ Design Compiler® RTL synthesis solution and IC Compiler placement … Read More → "Synopsys Galaxy Implementation Platform enables first-pass silicon success on Infineon’s 40-nanometer X-GOLD 626 wireless product"

Wokingham and Cambridge, UK – March 29, 2010.  EnSilica, a leading independent provider of front-end IC design services, has launched a major new version of its eSi-RISC Development Suite.  The eSi-RISC Development Suite v2.1 provides a comprehensive platform for easily evaluating EnSilica’s family of eSi-RISC highly configurable and low-power soft processor cores, along with a complete development environment for the creation, implementation and test of eSi-RISC processor embedded application designs.

Read More → "EnSilica launches major new version of its eSi-RISC Development Suite"