SAN JOSE, CA–(Marketwire – July 12, 2010) –  MicroProbe, Inc., a leading supplier of wafer test technology to the global semiconductor industry, today introduced the MEMS-based Mx-FinePitch (Mx-FP) product. This new class of probe card tackles the ultra-fine-pitch testing needs of leading-edge SoC and logic devices found in applications like digital cameras, set-top boxes and digital TVs. Built for multi-DUT (Devices under Test) testing in high-volume production environments, the product requires no probe positioning adjustments throughout its lifetime. It is highly customizable for diverse application needs, providing unmatched design flexibility for SoC feature integration. Chief advantages include … Read More → "MicroProbe Tackles Mobile Consumer IC Wafer Test Challenges With New MEMS-Based Multi-DUT, Ultra-Fine-Pitch Probe Card"

July 8th, Uppsala, Sweden – IAR Systems today announced that it has incorporated its newly developed power debug and analysis tools within IAR Embedded Workbench for ARM. Bucking the software industry’s trend of charging for new software features, IAR Systems has opted to include its innovative technology as standard.

The new tools provide the capability to correlate current sampling alongside program execution, allowing analysis of the software’s influence on power consumption and providing developers with the means to optimize source code to minimize power consumption.

“We are working with some of the largest suppliers … Read More → "IAR Systems incorporates power debugging as standard in IAR Embedded Workbench"

MOUNTAIN VIEW, Calif, July 7 – Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Open-Silicon a leading system-on-chip (SoC) design and semiconductor manufacturing company, has licensed and integrated 50 high speed DesignWare(r) IP products into customers’ chips with 100 percent first-pass silicon success. The IP products include complete solutions consisting of configurable digital controllers, PHYs which support leading process technologies from 180 to 28 nanometres, verification IP, as well as analogue front ends and data converters. In addition to integrating many of Synopsys’ silicon-proven interface and analogue IP products, Open-Silicon has incorporated … Read More → "Open-Silicon integrates 50 DesignWare interface and analogue IP products with 100 percent silicon success"

San Diego, USA and Cheltenham, UK – 6th July 2010. Atego, the leading independent supplier of industrial-grade, collaborative development tools for engineering complex, mission- and safety-critical architectures, systems, software and hardware, has launched Atego Process Director, a ground-breaking, new web-based environment for process definition, management and deployment.

Atego Process Director delivers a highly scalable, extensible and pragmatic range of new web-based process-oriented capabilities for operational, engineering and development process authoring, roll-out, management, governance measurement and optimization. Its thin client user interface runs on contemporary browsers and also supports mouse-free environments such as Windows Touch, iPad and the iPhone, proactively … Read More → "Atego launches Atego Process Director"

PISCATAWAY, N.J., USA, 14 June 2010 — The IEEE announced today the launch of Get IEEE 1685™, a website where users can download the current version of the standard free of charge. IEEE 1685™ is the first standard description of Intellectual Property blocks in highly automated design environments … Read More → "Get IEEE 1685™ Launches to Provide Industry with Free Access to Standard for Automated Design Environments"

ACTON, MASS. –– June 21, 2010 –– Carbon Design Systems today announced that TSMC added Carbon Model Studio and SoC Designer Plus to TSMC Reference Flow 11.0. 

The Carbon products used in Reference Flow 11.0 support performance and power analysis at the System (ESL) and register transfer level (RTL), and also provide a platform for pre-silicon software development.

Read More → "Carbon Design Systems Announces Performance, Power Analysis in TSMC Reference Flow 11.0"

SANTA CLARA, Calif., June 15, 2010 — Agilent Technologies Inc. (NYSE: A) today expanded its digital communications analyzer (DCA) portfolio with the introduction of the 86100D DCA-X wide-bandwidth oscilloscope. The DCA-X provides engineers with the tools needed to characterize … Read More → "Agilent Technologies Introduces Wide-Bandwidth Oscilloscope for Faster, More Accurate Characterization of High-Speed Digital Designs"

SANTA CLARA, Calif., June 14, 2010 — Agilent Technologies Inc. (NYSE: A) today announced that its SystemVue Electronic System-Level (ESL) design software, version 2010.07, will automatically generate IBIS Algorithmic Modeling Interface (IBIS-AMI) models. IBIS-AMI, a modeling standard for serializer-deserializer (SerDes) transceivers, was created to enable fast, statistically significant analysis of high-speed digital chip-to-chip links. For the first time, < … Read More → "Agilent Technologies Offers Industry’s First Automatic IBIS-AMI Model Generation Capability in an ESL Design Flow"

MOUNTAIN VIEW, Calif., June 14, 2010—Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced it is delivering an optimised, pre-validated design environment for the Common Platform alliance (CPA) 32/28 nanometer(nm) high-k metal gate (HKMG) technology based on Synopsys’ Lynx Design System. Accomplished under a multi-year collaboration with ARM and the Common Platform alliance [IBM, Samsung Electronics, Co., Ltd., GLOBALFOUNDRIES], the optimisations to the Lynx Design System and its Galaxy™ Implementation Platform-enabled flow for ARM’s advanced physical IP and the ARM Cortex™A9 MPCore … Read More → "Synopsys delivers optimised Lynx Design System for Common Platform 32/28nm technology"

MOUNTAIN VIEW, Calif., June 14 /PRNewswire-FirstCall/ — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, today introduced its Galaxy Characterization Solution. The Galaxy Characterization Solution is a comprehensive suite of tools architected to generate compact, highly-accurate libraries for the design and implementation of complex system-on-chips (SoCs). Today’s SoCs require libraries that contain hundreds of gigabytes of timing, power, noise and process variation data to ensure the chip meets all performance criteria. The Galaxy Characterization Solution is the only solution that can reduce the library size by an average of 4X and … Read More → "Synopsys Unveils Galaxy Characterization Solution for Standard Cells, Complex Macros and Memories"