MOUNTAIN VIEW, Calif., Oct. 21 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, will host a PrimeTime® Special Interest Group (SIG) event in Silicon Valley unveiling the latest user results with Synopsys’ PrimeTime HyperScale Technology, the next-generation static timing analysis (STA) solution for large-chip hierarchical design. Speakers include timing experts from AMD, NVIDIA and others.

To register to attend this event, or for additional information, please visit: Read More → "Expert Static Timing Users Share Results About Latest Synopsys Timing Innovation — PrimeTime HyperScale Technology"

Munich, Germany and SANTA CLARA, Calif., October 22, 2010 – Nomor Research GmbH and Agilent Technologies Inc. (A) today announced the availability of a simple cost-effective method for generating realistic LTE uplink inter-cell interference signals required for LTE field trials by using Agilent’s MXG signal generators. This is the most cost-effective cellular interference signal generation method available for engineers who need to validate LTE system performance under real-world signal conditions.

Nomor Research has developed a method for generating realistic inter-cell interference signals using off-the-shelf signal generators for performance testing in LTE field trials and lab tests. Realistic emulation … Read More → "Nomor Research GmbH and Agilent Technologies Inc. Provide Solution to Generate LTE Uplink Inter-cell Interference Signals for LTE Field Trials and Performance Tests"

ACTON, MASS. –– October 21, 2010 –– Carbon Design Systems™ today unveiled Carbon IP Exchange, a web portal with a rich library of system-level models from a variety of intellectual property (IP) vendors to streamline the creation of virtual platforms for architecture analysis, performance optimization and pre-silicon software development.

The portal, used with Carbon SoC Designer Plus and SystemC-based platforms, eliminates the virtual platform assembly bottleneck by offering models for the majority of third-party IP content used in … Read More → "Carbon Design Systems Launches IP Web Portal to Streamline Access to Virtual Platform Building Blocks"

SANTA CLARA, Calif., Oct. 18, 2010 — Agilent Technologies Inc. (NYSE: A) today announced that its N7309A chipset software now supports  RF IC and MxFEs (mixed signal front ends) converters from Analog Devices, including the ADF4602 and AD9963.

The new devices address the high-volume manufacturing test needs of Percello’s Aquilo Femtocell System-on-a-Chip (SoC) product line. The N7309A chipset software … Read More → "Agilent Technologies Adds New Devices to Chipset Software, Expands Percello’s Femtocell SoC Capabilities"

Uppsala,Sweden, 19th October 2010. IAR Systems today announced its strategy to strengthen the development of its power debugging technology introduced in 2010. The ability to correlate source code with power consumption, which enables power savings, has created significant interest from customers and partners. Based on this there will be several new product additions that span across the technology chain.

New analysis features will be added to IAR Embedded Workbench to help developers better understand how the software impacts system power consumption. Most importantly, power debugging will be made available for more target architectures, the first to be revealed … Read More → "IAR Systems extends development of power debugging technology"

MOUNTAIN VIEW, Calif., Oct. 19 /PRNewswire/ — The Interoperable PDK Libraries (IPL) Alliance announced today that STMicroelectronics has joined the Alliance as the first semiconductor board member. STMicroelectronics brings years of experience in multi-vendor analog/mixed-signal design flows to further the IPL Alliance’s efforts in creating and promoting interoperable process design kit (iPDK) standards.

The IPL Alliance is an industry-wide collaborative effort to develop an interoperable ecosystem for custom design. Its current focus is on PDK standards. The IPL Alliance released IPL 1.0, the semiconductor industry’s first open standard for interoperable process design kits, in February 2010. Semiconductor companies … Read More → "STMicroelectronics Joins the IPL Alliance as the First Semiconductor Board Member"

MOUNTAIN VIEW, Calif. – October 19, 2010 – CEVA, Inc. [(NASDAQ: CEVA); (LSE: CVA)], the leading licensor of silicon intellectual property (SIP) platform solutions and DSP cores, today introduced the CEVA-XC323™, the industry’s first high performance vector DSP for 4G wireless infrastructure applications. The CEVA-XC323 delivers up to 4x performance improvement in wireless infrastructure applications compared to incumbent infrastructure VLIW DSPs, such as those offered by Texas Instruments, and lowers the overall bill-of-materials by significantly reducing the number of processors and hardware accelerators required. The CEVA-XC323 is already in design with a wireless infrastructure vendor for 4G Software Defined Radio ( … Read More → "CEVA Expands into 4G Wireless Infrastructure Market with Industry-first Vector DSP for Software Defined Radio Platforms"

MOUNTAIN VIEW, Calif., Oct. 18 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that its 23rd Electronic Design Automation (EDA) Interoperability Forum will expand its focus to include system-level design interoperability topics, in addition to verification and analog design updates. A special live Conversation Central session will focus on the importance of system-level design tools interoperability in the wireless supply chain, with Synopsys host Karen Bartleson interviewing Will Strauss, principal analyst at … Read More → "Synopsys’ 23rd EDA Interoperability Forum to Feature System-Level Design Tool Interoperability Focus"

Unterpremstaetten, Austria (October 18, 2010) – austriamicrosystems (SIX: AMS), a leading global designer and manufacturer of high-performance analog ICs, has announced the AS8650 smart power management System Basis Chip (SBC) which is the first to combine a DC-DC converter and a high-speed transceiver on one chip. The AS8650 features high efficiency of 85 % minimum over all operation use-cases, while high integration reduces cost, space and development time for engine control units (ECU) with a high-speed CAN interface.

The AS8650 SBC includes three LDOs (low-drop-out voltage regulators) with programmable outputs from 1.8 V to 3.3 V. Each LDO is powered by the embedded … Read More → "austriamicrosystems unveils the AS8650 SBC for automotive applications, the industry’s first with integrated DC-DC converter & CAN interface"