SAN JOSE, CALIF. –– November 2, 2010 –– Imagination Technologies of Hertfordshire, United Kingdom, signed an agreement to extend the license of Forte Design Systems’ software for the continued design and support of its advanced, current-generation POWERVR graphics intellectual property (IP) cores.

Imagination uses Forte’s CellMath Optimizer to help enable its licensing partners to optimize silicon efficiency and performance in their target process technology.  As part of this latest agreement, Imagination will … Read More → "Imagination Technologies Licenses Forte’s CellMath IP and Tools"

SANTA CLARA, Calif., and MUNICH, Oct. 22, 2010 — Agilent Technologies Inc. (NYSE: A) and Nomor Research GmbH today announced the availability of a simple, cost-effective method for generating realistic LTE uplink inter-cell interference signals using Agilent’s MXG signal generators.

This is the most cost-effective approach for engineers who need to generate real-world cellular interference signal conditions to validate LTE system performance. The uplink signals are required for LTE field trials.</ … Read More → "Agilent Technologies and Nomor Research GmbH Generate LTE Uplink Inter-cell Interference Signals for LTE Field Trials, Performance Tests"

WILSONVILLE, Ore., November 1, 2010—Mentor Graphics Corporation (NASDAQ: MENT) today announced it has teamed up with ARM to provide an automated memory test and repair solution for ARM embedded memories and processor cores. The new capability provides full interoperability between Mentor’s industry-leading Tessent™ memory test and repair solution and ARM’s family of cores and embedded memory IP.

“The requirements for embedded memories are increasing as design … Read More → "Mentor Graphics and ARM Join Forces on Memory Test and Repair"

Ottawa, Canada and Santa Clara, Calif. – October 27, 2010

What:

Sidense is exhibiting at the International System-on-Chip (ISoC) conference, where they will discuss how Sidense’s 1T-OTP non-volatile memory IP, adopted by many top-tier semiconductor foundries and selected IDMs, can simplify chip designs and extend a product’s life cycle. 

… Read More → "Sidense Exhibiting at International System-on-Chip (ISoC) Conference"

Bristol, UK and Sunnyvale, Calif. – Oct. 27th, 2010– XMOS® and Attero Tech today announced a joint reference design for audio/visual bridging (AVB) applications, featuring the industry’s lowest cost solution for Ethernet AVB endpoints. The low-cost XCore® XS1-L2 dual-core processor is at the heart of the new reference design.

The development of new standards, such as AVB, needs technology that can be adapted quickly. XCore processors … Read More → "World’s Lowest-Cost Ethernet AVB End-Point Solution Eliminates Barriers for New A/V Standard"

NEW YORK, PARIS and FAIRFAX, Va., October 26, 2010 – SIGAda 2010 – AdaCore, a leading supplier of Ada language tools and support services, today announced the release of GNAT Programming Studio (GPS) 5.0. This new major version of AdaCore’s graphical Integrated Development Environment (IDE) offers enhanced support for C and C++, more powerful source editing, simpler use, and integration of GNATstack (a static analysis tool that determines a program’s maximum stack requirements). GPS is provided with GNAT Pro on most platforms, for both … Read More → "AdaCore releases GPS 5.0"

MOUNTAIN VIEW, Calif., Oct. 26 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Realtek Semiconductor Corporation, one of the world’s leading network and multimedia IC providers, deployed Synopsys power-aware test to avoid power issues during test and accelerate production testing of its new digital media processor.  Excessive power consumption during manufacturing test leads to overheating, IR drop, and other effects that can cause devices to fail, impacting profitability and delaying production ramp.  Designers at Realtek avoided these issues by reducing the device power consumption … Read More → "Synopsys Power-Aware Test Speeds Time to Volume Production at Realtek"

Richardson, TX, October 26, 2010 – Alibre Inc. www.alibre.com, the award-winning developer of the world’s most affordable professional 3D design solutions, today announced a huge leap in 3D CAD design performance with the release of its latest version, Alibre Design 2011. Alibre Design 2011 now makes 3D designing easier and more robust with major enhancements, including a complete top to bottom code re-write, native 64-bit version, powerful sheet metal conversion tools, and a myriad of time saving tools … Read More → "Alibre Launches Next Generation 3D Design Software — Alibre Design 2011"

Rochester, NY (October 26, 2010) – EMA Design Automation™ (www.ema-eda.com), a full-service provider of electrical and mechanical CAD tools, today announced Virtual Classroom Training – combining the experience of instructor-led classroom training with the convenience of online training for Cadence® OrCAD® and PSpice ® PCB design tools, and Autodesk® mechanical CAD tools. “Aggressive time to market project schedules are forcing end users to find creative ways to invest in learning,” said Manny Marcano, president and CEO of … Read More → "EMA Adds Virtual Classroom Training for OrCAD, PSpice, and Autodesk Users"