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GigaChip™ Alliance Adds Xilinx to its Roster and Launches Website

SANTA CLARA, Calif. – January 31, 2011 –MoSys, Inc. (NASDAQ: MOSY), a leading architect of serial chip-to-chip communications solutions that deliver unparalleled bandwidth performance for next generation networking systems and advanced system-on-chip (SoC) designs , today announced that Xilinx, Inc. (NASDAQ: XLNX) has joined the GigaChip Alliance, an ecosystem of companies that support the GigaChip Interface.  Current alliance participants include:  MoSys, Altera Corporation, NetLogic Microsystems and Xilinx.

In addition, MoSys announced the launch of the GigaChip Alliance website, which provides information regarding the GigaChip Interface and the … Read More → "GigaChip™ Alliance Adds Xilinx to its Roster and Launches Website"

Synopsys to Showcase DesignWare IP, FPGA Design, FPGA-Based Prototyping and HSPICE Solutions at DesignCon 2011

SANTA CLARA, Calif., Jan. 28, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, will showcase its latest DesignWare® DDR PHY Compiler, Synplify® FPGA design tools, HAPS® FPGA-based prototyping platform, and HSPICE® solutions at DesignCon 2011 in Santa Clara, California on February 1-2, 2011. See live demonstrations, speak with our product experts and find out how Synopsys can help you achieve predictable success.

DesignCon® is the definitive event for electronic design experts spanning chip, package, board, and system domains, addressing common issues in signal integrity, power … Read More → "Synopsys to Showcase DesignWare IP, FPGA Design, FPGA-Based Prototyping and HSPICE Solutions at DesignCon 2011"

Accellera Approves New Version of Electronic Design System Modeling Standard

NAPA, CA–(Marketwire – 01/27/11) – Accellera, an Electronic Design Automation (EDA) standards organization, announced today that its Board of Directors approved a new version of Accellera’s Standard Co-Emulation Modeling Interface (SCE-MI) specification as a new Accellera verification standard. Version 2.1 speeds up electronic design verification since it allows a model developed for simulation to run in an emulation … Read More → "Accellera Approves New Version of Electronic Design System Modeling Standard"

Synopsys Galaxy Implementation Platform Addresses Gigascale Design

MOUNTAIN VIEW, Calif., Jan. 31, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the 2010.12 release of its Galaxy™ Implementation Platform, delivering new technologies to address the scalability, convergence and throughput needs of “Gigascale” design. Faster runtime performance with multicore processing and innovations to increase design capacity throughout the Galaxy Platform enable engineering teams to gain productivity benefits for large-scale, complex integrated circuit (IC) design. Additionally, the Galaxy Platform includes comprehensive foundry-validated 28-nanometer (nm) silicon process node support for all routing and design rule checking (DRC) rules, extraction … Read More → "Synopsys Galaxy Implementation Platform Addresses Gigascale Design"

Latest Release of Synopsys IC Compiler Delivers Faster Design Closure

MOUNTAIN VIEW, Calif., Jan. 31, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of the latest release of IC Compiler, a key component of the Galaxy™ Implementation Platform. This development caps a year of leading innovations in physical design productivity. For two years in a row, IC Compiler has won an EDN Innovation Award. In 2010 it won for In-Design Physical Verification. The IC Compiler 2010.12 release advances this capability, making automatic DRC repair up to 7X faster. This latest release also delivers new performance improvements for … Read More → "Latest Release of Synopsys IC Compiler Delivers Faster Design Closure"

Cortus will present their range of processors for embedded systems at this year’s DesignCon with their partner Avant Technology.

January 28th 2011 – Cortus will present their range of processors for embedded systems at this year’s DesignCon2011 with their partner Avant Technology. The Cortus family of processors for embedded systems offer a complete range of solutions for embedded systems designers. Cortus have processors for designers who need a highly cost effective processor. They also have solutions for designers who need high performance multi-core systems yet have only tiny power and silicon budgets.

Avant Technology represents the entire range … Read More → "Cortus will present their range of processors for embedded systems at this year’s DesignCon with their partner Avant Technology."

Mistral announces Curtiss Wright’s First OpenVPX™ Multiprocessing DSP Engine based on Intel® Core™ i7 Processors

Bangalore, Thursday, 27th January 2011 – Mistral Solutions Pvt. Ltd., a leading technology design and systems engineering company, today announced the availability of Curtiss Wright’s CHAMP-AV8: its first rugged, high performance OpenVPX DSP engine based on the new quad-core Intel® CoreTM i7-2715QE processor. 

Read More → "Mistral announces Curtiss Wright’s First OpenVPX™ Multiprocessing DSP Engine based on Intel® Core™ i7 Processors"

Molex Experts Showcase Interconnect Expertise at DesignCon 2011

LISLE, Ill. – January, 27, 2011 – Molex Incorporated will showcase its proven expertise in high-speed, high-density, and high-signal integrity interconnect technology at DesignCon 2011, February 1 – 2, Santa Clara, CA.   Molex experts will participate in technical paper presentations that feature new interconnect design developments and conduct ongoing product demonstrations of the latest Molex interconnect solutions.

Technical Paper Presentations</ … Read More → "Molex Experts Showcase Interconnect Expertise at DesignCon 2011"

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