News – Page 2141 – EEJournal

Leading DTV IC Supplier MStar Semiconductor Licenses New Processor Cores from MIPS Technologies

January 17, 2011

SUNNYVALE, CA – January 13, 2011 – MIPS Technologies, Inc. (NASDAQ: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, today announced that long-time MIPS licensee MStar Semiconductor has licensed the multi-threaded multiprocessing MIPS32® 1004K™ Coherent Processing System (CPS) and the superscalar MIPS32 74K® core. These cores provide the performance needed for next-generation connected DTV and technologies such as Java, JavaScript, Adobe® Flash® Player and Android™.

Read More → "Leading DTV IC Supplier MStar Semiconductor Licenses New Processor Cores from MIPS Technologies"

Magma Delivers Hierarchical Reference Flow for the Common Platform Alliance’s 32/28-nm Low-Power Process Technology

January 17, 2011

SAN JOSE, Calif., Jan. 17, 2011 — Magma® Design Automation (Nasdaq: LAVA), today announced the availability of a proven hierarchical RTL-to-GDSII reference flow for the Common Platform™ alliance’s 32/28-nanometer (nm) low-power process technology. This reference flow leverages the Talus® IC implementation system’s unique power optimization and management capabilities, the latest ARM Artisan® 32/28-nm LP process libraries and the Common Platform alliance’s advanced 32/28-nm process technology to enable designers to reduce power, turnaround time and cost per die.

The hierarchical reference design was implemented using Magma’s … Read More → "Magma Delivers Hierarchical Reference Flow for the Common Platform Alliance’s 32/28-nm Low-Power Process Technology"

EUROPRACTICE adds vfAnalyst to academic software service

January 17, 2011

Eindhoven, The Netherlands, January, 2011 – Vector Fabrics announces it has signed a contract with the EUROPRACTICE Software Service for the provision of its cloud-based vfAnalyst tool to European academic institutions and publicly funded research laboratories. Under this agreement, vfAnalyst will be available to over 530 universities and 100 research institutes across 44 countries.

vfAnalyst will aid research staff and students in implementing algorithms, protocols, and other critical software programs on multicore and heterogeneous platforms. The tool’s unique graphical interface makes it easy to identify which portions of the program can be run in parallel, and what kinds of data … Read More → "EUROPRACTICE adds vfAnalyst to academic software service"

Synopsys Announces Production-Ready Lynx Design System Optimized for Common Platform 28-nm High-K Metal Gate Technology

January 17, 2011

MOUNTAIN VIEW, Calif., Jan. 17, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced it is delivering a low power, high-performance system-on-chip (SoC) design solution optimized for the Common Platform alliance (CPA) 28-nanometer(nm) high-k metal gate (HKMG) technology. Based on Synopsys’ Lynx Design System and its Galaxy™ Implementation Platform-enabled flow with Synopsys DesignWare® Interface IP, this solution was built through a multi-year collaboration with ARM® and the Common Platform alliance [IBM, Read More → "Synopsys Announces Production-Ready Lynx Design System Optimized for Common Platform 28-nm High-K Metal Gate Technology"

Renesas Electronics Introduces New SoC that Enables Industry-Leading 16-Megapixel Still Image and High-Speed Continuous Shooting for Mobile Phones

January 14, 2011

Dusseldorf, 13th January 2011 – Renesas Electronics, a premier provider of advanced semiconductor solutions, today announced the availability of a new system-on-chip (SoC), the CE150, for smartphones and high-end mobile phones. The CE150 delivers industry-leading resolution of 16 megapixels and the ability to capture full-HD video (1920 × 1080 pixels).

The new CE150 SoC is designed to support high-speed continuous image shooting, which is demanded in high-end cameras offering top picture quality. The new SoC features high-speed enhancements including a two-lane MIPI® CSI-2 (see Note 1) high-speed output interface from … Read More → "Renesas Electronics Introduces New SoC that Enables Industry-Leading 16-Megapixel Still Image and High-Speed Continuous Shooting for Mobile Phones"

PCA-6782 SBC with New Intel® Atom™ N455/D525 Raises the Benchmark for Reliability.

January 14, 2011

Irvine, California, Jan 13, 2011 –Advantech, the embedded platform and integration services provider, announces the introduction of a new Intel® Atom™ N455/D525 ISA half-size Single Board Computer (SBC). PCA-6782 features the latest high performance Intel Atom N455/D525 single/dual-core processors which are ideal for embedded applications that required a balance of performance and lower power. The latest Intel Atom single core N455 and dual core D525 processors have an integrated graphic and memory controller (GMCH) all on the same chip. This all-in-one solution enables higher performance and even more power savings. PCA-6782 offers high reliability … Read More → "PCA-6782 SBC with New Intel® Atom™ N455/D525 Raises the Benchmark for Reliability."

AgO Inc adds feasibility analysis to AnXplorer analog design optimization tool

January 12, 2011

January 10th 2011 – AgO Inc, a technology leader in analog and RF circuit optimization software, announces the immediate availability of AnXplorer 2010.12. The new release brings enhanced productivity to analog IC design teams through its new feasibility analysis capability which can rapidly identify a feasible region for circuit design variables.

The new feasibility analysis mode identifies regions of the design space where all circuit sizing rules are met. This rapidly eliminates those parts of the design space which result in unstable circuits. Since only DC operating point simulations are required the mode is computationally efficient and fast. By … Read More → "AgO Inc adds feasibility analysis to AnXplorer analog design optimization tool"

AgO Inc adds feasibility analysis to AnXplorer analog design optimization tool

January 12, 2011

Jasper Announcing Newest Formal Verification Technology at EDSFair, Yokohama, Jan. 27-28 — Booth 002

January 12, 2011

MOUNTAIN VIEW, CA–(Marketwire – January 12, 2011) –

WHAT: Jasper Design Automation and its Japanese distributor CyberTec will display Jasper’s latest formal verification technology innovations at this month’s EDSFair. For more information on EDSFair:http://www.edsfair.com/e/.

WHEN: EDSFair takes place Jan. 27-28, 2011

WHERE: EDSFair is held at Pacifico Yokohama Exhibition Hall, Yokohama, Japan. Jasper and CyberTec will be in Booth 002.