News – Page 2110 – EEJournal

Laird Technologies to Attend RFID Journal LIVE! 2011 Conference and Exhibition

March 31, 2011

St. Louis, Missouri, USA – March 30, 2011 – Laird Technologies, Inc., a global leader in the design and supply of customized performance-critical components and systems for advanced electronics and wireless products, today announced it will be attending the RFID Journal LIVE! 2011 conference and exhibition. The conference will be held at the Orange County Convention Center in Orlando, Florida, April 12-14, 2011. Laird Technologies will present at booth #742.

Laird Technologies will showcase its RFID antenna portfolio and preview two new RFID products: a UHF near … Read More → "Laird Technologies to Attend RFID Journal LIVE! 2011 Conference and Exhibition"

CISSOID unveils a High Voltage, 225°C Silicon Carbide (SiC) Power Switch with Logic-level Gate Control

March 31, 2011

Mont-Saint-Guibert, Belgium – 31 March 2011. CISSOID, the leader in high-temperature semiconductor solutions, unveils JUPITER, the first high-temperature silicon carbide high-voltage switch with seamless gate control through a simple logic-level 0/5V. CHT-JUPITER is a 600V normally-off switch rated for 1A drain current at 225°C. It includes a silicon carbide device, and it is packaged in a hermetically sealed TO-254 metal package, guaranteed for operation from -55°C up to +225°C.

CHT-JUPITER’s on-resistance ranges from 0.7 Ohms at 25°C to 1.25 Ohms at 225°C. Its input capacitance is typically 430pF. The gate leakage and drain … Read More → "CISSOID unveils a High Voltage, 225°C Silicon Carbide (SiC) Power Switch with Logic-level Gate Control"

DMAP upgrades IPs compliant with the DO254 standard

March 31, 2011

Meyreuil, France, March 31th, 2011 The picture is clear: avionics industry is becoming more and more depending of complex embedded systems. In particular, the needs expressed in the segment of the electronics are growing and require finding new means in the choice of implementation. The needs of sustainable solutions to long-term (>25 years) a specificity of aeronautic market leads naturally to the desire to control the content of each system, particularly strategic components that are processor and their peripherals, but also associated functions such as communications interfaces. Recent developments around FPGA devices can … Read More → "DMAP upgrades IPs compliant with the DO254 standard"

Fairchild Semiconductor Achieves First-Pass Silicon Success with DesignWare USB 2.0 nanoPHY IP

March 31, 2011

MOUNTAIN VIEW, Calif., March 31, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Fairchild Semiconductor (Fairchild) has achieved first-pass silicon success for its FUSB2500 UTMI+ Low-Pin Interface (ULPI) USB On-The-Go (OTG) transceiver chip utilizing Synopsys’ DesignWare® USB 2.0 nanoPHY IP. Fairchild selected Synopsys’ silicon-proven DesignWare IP because it was low in power and area and offered impressive technical features, including auto-detect functionality and ULPI interface. In addition, the tunability of the PHY enabled Fairchild to easily conduct post-silicon adjustments without incurring the cost of a metal respin. … Read More → "Fairchild Semiconductor Achieves First-Pass Silicon Success with DesignWare USB 2.0 nanoPHY IP"

New TESEQ Dual Voltage Programmable Power Source

March 31, 2011

March 2011 – Teseq, a leading developer and provider of instrumentation and systems for EMC emissions and immunity testing, has released the VAR 3005, a dual voltage power source controlled by Teseq’s NSG 3000 series of EMC test generators. This new programmable power source not only regulates test voltage, but also generates the reduced voltage for dips and drops testing of EUTs (Equipment Under Test).

The VAR 3005, controlled using either the NSG 3000’s front panel display or the WIN 3000 PC software, has internal advanced microprocessor based electronics. The unit features advanced self-regulation and has several self-test … Read More → "New TESEQ Dual Voltage Programmable Power Source"

HDL Design House Adopts Magma’s Full Suite of Software to Accelerate SoC and IP Development

March 31, 2011

SAN JOSE, Calif., March 31, 2011 – Magma Design Automation Inc. (Nasdaq: LAVA), a provider of chip design software, and HDL Design House, creators of re-usable IP cores, verification components and behavioral simulation models, today announced that HDL Design House has adopted the full suite of Magma chip design software, including the Talus® digital IC implementation system and the Titan™ mixed-signal design platform. With Magma as its primary EDA vendor, HDL Design House will now be able to provide its clients with complete mixed-signal system on chip (SoC) design services, and be able … Read More → "HDL Design House Adopts Magma’s Full Suite of Software to Accelerate SoC and IP Development"

Synopsys Announces Availability of DesignWare PHY and Embedded Memory IP for TSMC Advanced 28-nanometer Technologies

March 30, 2011

MOUNTAIN VIEW, Calif., March 30, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it has worked with TSMC to develop a broad portfolio of DesignWare® interface PHY IP including SuperSpeed USB 3.0,USB 2.0, Read More → "Synopsys Announces Availability of DesignWare PHY and Embedded Memory IP for TSMC Advanced 28-nanometer Technologies"

Lattice Semiconductor to Showcase Latest Low Cost, Low Power Design Solutions at FPGA Camp

March 30, 2011

HILLSBORO, OR–(Marketwire – March 30, 2011) – Lattice Semiconductor Corporation (NASDAQ:LSCC) today announced that it is participating in FPGA Camp, April 6^th in Santa Clara, California. Lattice is both a sponsor and participant in this design community-organized event. Lattice will participate in the panel discussion, “State of FPGAs – Current and Future,” and also provide demonstrations highlighting the latest applications enabled by their recently announced MachXO2™ PLD and LatticeECP3™ FPGA technologies.

“We are proud to sponsor and participate … Read More → "Lattice Semiconductor to Showcase Latest Low Cost, Low Power Design Solutions at FPGA Camp"

Magma’s New Excalibur-Litho is First System to Efficiently Integrate Real-Time Data from Semiconductor Manufacturing Floor with CAD Information, Speeding Yield Ramp at Advanced Nodes

March 30, 2011

SAN JOSE, Calif., March 30, 2011 – Magma® Design Automation Inc. (Nasdaq: LAVA), a provider of chip design software, today announced Excalibur-Litho™, a complete fab analysis framework that supports the development and monitoring of advanced lithography solutions. Excalibur-Litho is the first system to efficiently integrate design and real-time data from the semiconductor manufacturing floor, including defectivity, metrology and tool history, enabling an unmatched level of data analysis, monitoring and process control. Excalibur-Litho optimizes yield ramps with built-in solutions for litho qualification through the proprietary coupling of design-based binning, electrical cross mapping, and fab-wide data correlation. This enables unprecedented … Read More → "Magma’s New Excalibur-Litho is First System to Efficiently Integrate Real-Time Data from Semiconductor Manufacturing Floor with CAD Information, Speeding Yield Ramp at Advanced Nodes"

Aster Technologies – The unique Integrated DfT workflow from Design to Production

March 30, 2011

During APEX 2011 at the Mandalay Bay Resort & Convention Center in Las Vegas, ASTER Technologies, the leading supplier in Board-Level Testability and Test Coverage analysis products, announces the first tool to provide an integrated workflow for DfT and test coverage analysis from design through to mainstream production.

Design-For-Test is becoming crucial to ensure complex board performances. In the traditional Design flow, DfT is a specific step after the layout phase as addressed by tools such as FabMaster-TestExpert. The CAD file is loaded and a mechanical analysis is performed in order … Read More → "Aster Technologies – The unique Integrated DfT workflow from Design to Production"

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