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Synopsys DesignWare IP First to Support Final Release of PCI Express 3.0 Specification

MOUNTAIN VIEW, Calif., Feb. 28, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it is the first IP provider to support the final version of the PCI Express® (PCIe®) 3.0 base specification (version 1.0), recently released by the PCI Special Interest Group (PCI-SIG®). In addition, Synopsys has enhanced its DesignWare® digital controllers … Read More → "Synopsys DesignWare IP First to Support Final Release of PCI Express 3.0 Specification"

Duolog Extends Solutions to Support EDA360 Vision in Collaboration With Cadence

DUBLIN, IRELAND–(Marketwire – February 24, 2011) – Duolog Technologies, the award-winning developer of IP and SoC integration products, today announced that its Socrates Chip Integration Hub leverages a multi-standards-based methodology enabled through close collaboration with Cadence Design Systems, Inc. a leader in global electronic design innovation.

Duolog’s Socrates integration platform enables designers to manage metadata for their IP and systems through auto-generation of verification, hardware and software design data from a central, verified source to ensure that engineering teams remain synchronized at all times, and that costly bugs due to misalignment, miscommunication or misinterpretation are eradicated. Socrates employs … Read More → "Duolog Extends Solutions to Support EDA360 Vision in Collaboration With Cadence"

RFMD® Unveils Portfolio Of Cellular Front End Modules For 3G/4G Switch And Signal Conditioning Applications

Barcelona, Spain, February 15, 2011 — RF Micro Devices, Inc. (Nasdaq GS: RFMD), a global leader in the design and manufacture of high-performance radio frequency components and compound semiconductor technologies, today announced the addition of four new products to RFMD’s expanding portfolio of front end modules for 3G/4G switch and signal conditioning applications.

RFMD’s switch and signal conditioning product portfolio includes antenna switch modules, switch filter modules, switch duplexer modules, RF power management components, and low noise amplifiers. The four newly introduced products – the RF8889A, the RF1291, the RF1194A, and the RF1196 & … Read More → "RFMD® Unveils Portfolio Of Cellular Front End Modules For 3G/4G Switch And Signal Conditioning Applications"

Versatile Ultra-low Power Biomedical Signal Processor

San Francisco, US – February 23, 2011 – At today’s International Solid-State Circuit Conference (ISSCC2011), imec, Holst Centre and NXP present a versatile ultra-low power biomedical signal processor, CoolBioTM, meeting the requirements of future wearable biomedical sensor systems. The biomedical signal processor consumes only 13pJ/cycle when running a complex ECG (electrocardiogram) algorithm at 1MHz and 0.4V operating voltage. This C-programmable chip is voltage and performance scalable supporting a frequency range of 1MHz up to 100MHz with an operating voltage from 0.4 to 1.2V.

Intelligent body area networks (BANs) consisting of wireless sensors nodes which continuously monitor vital … Read More → "Versatile Ultra-low Power Biomedical Signal Processor"

Faraday Picks Silicon Frontline’s F3D for Accurate Post-Layout 3D Extraction of Analog and Digital Converters (ADCs)

Campbell, CA February 24,2011 – Silicon Frontline Technology, Inc. (SFT), an Electronic Design Automation (EDA) company, in the post-layout verification market focused on solutions for nanometer design applications, announced today that after an extensive evaluation of post-layout verification tool offerings Faraday picked Silicon Frontline’s F3D for its accurate 3D extraction. The high accuracy results of F3D for Faraday’s Analog to Digital Converters ( … Read More → "Faraday Picks Silicon Frontline’s F3D for Accurate Post-Layout 3D Extraction of Analog and Digital Converters (ADCs)"

Renesas Electronics Announces Low-Power Microcontrollers with Large Capacity Memory

Dusseldorf, 25th February 2011 –  Renesas Electronics, a premier provider of advanced semiconductor solutions, today announced the availability of its eight new 32-bit V850 microcontrollers (MCUs), an addition to its existing J Series. These new V850ES/Jx3-L MCUs are an extension of the successful low power V850ES/Jx3-L 32-bit MCUs that were introduced in early 2010. They are designed for low power, portable applications with high density memory from 768 kilobyte (KB) flash/80KB RAM to 1 megabyte (MB) flash/80KB RAM to support increasing memory demand. … Read More → "Renesas Electronics Announces Low-Power Microcontrollers with Large Capacity Memory"

Datalight Releases First Full-featured File System for Embedded Linux

Bothell, WA, – February 24, 2011 – Datalight announced today that it has released Reliance Nitro 2.0, the first full-featured file system for embedded Linux. The new file system combines strong read and write performance with fast and consistent mount time, rock-solid reliability, a comprehensive tool set, and support by a dedicated team of in-house engineers.

Makers of embedded products need flexible and supported software as these devices continue to increase in … Read More → "Datalight Releases First Full-featured File System for Embedded Linux"

ARM Cortex-M3 Reference Platform Running Micrium ?C/OS II Released On OVP

THAME, United Kingdom, February 24, 2011 – Imperas™ earlier this month released a reference virtual platform based on the ARM® Cortex™-M3 processor, using the Micrium μC/OS II RTOS.  This reference platform will benefit embedded system designers by providing open source models of the virtual platform, enabling a quicker start to software development and testing with the virtual platform.  In addition, Imperas now has expanded its Multiprocessor/Multicore Software Development Kit™ (M*SDK™) to include CPU-aware support for the Cortex-M3 processor model, and OS-aware support for … Read More → "ARM Cortex-M3 Reference Platform Running Micrium ?C/OS II Released On OVP"

Oasys Design Systems Enhances Chip Synthesis with Power Capabilities

SANTA CLARA, CALIF. –– February 24, 2011 — Oasys Design Systems today unveiled the latest version of its revolutionary Chip Synthesis™ platform with enhanced capabilities that include chip-level power analysis and the ability to re-synthesize a design from the register transfer level (RTL) with new power constraints.

“Power is now the toughest design constraint,” asserts Paul van Besouw, Oasys’ president and chief executive officer (CEO).  “Traditional synthesis tools can’t handle power … Read More → "Oasys Design Systems Enhances Chip Synthesis with Power Capabilities"

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