Optimized development tool for NXP’s digital signal controller (DSC) architecture
Lauta (Germany) April 19, 2011 – PLS presents at ESC Silicon Valley Booth 2301 at multicore Expo, the latest Version of the Universal Debug Engine (UDE). UDE 3.0.7 is equipped with optimized test and debug functions for NXP’s LPC4300 highly integrated dual-core system-on-chip (SoC) family and offers unlimited dual-core debugging under a single user interface.
The LPC4300 family brings together an ARM Cortex-M4 with a Cortex-M0 to an asymmetrical dual-core digital signal controller (DSC) architecture. Both processors each operate with their own … Read More → "Optimized development tool for NXP’s digital signal controller (DSC) architecture"