Veridae Systems and Mentor Graphics Partner to Accelerate Development, Debug and Verification of FPGAs
SAN DIEGO, CA. –– June 6, 2011 –– Veridae Systems and Mentor Graphics today announced they’ve partnered to support a complete FPGA development flow combining Mentor Graphic’s Precision® Synthesis FPGA design tools and Veridae’s Certus or Corus validation and debug solutions. The combination of tools will accelerate the development, verification and time-to market of single and multi-FPGA based systems.
“We are thrilled to collaborate with Mentor Graphics to integrate Corus and Certus with the Precision Synthesis tools,” said Jim Derbyshire, Veridae’s chief executive officer. “The … Read More → "Veridae Systems and Mentor Graphics Partner to Accelerate Development, Debug and Verification of FPGAs"