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Veridae Systems and Mentor Graphics Partner to Accelerate Development, Debug and Verification of FPGAs

SAN DIEGO, CA. –– June 6, 2011 –– Veridae Systems and Mentor Graphics today announced they’ve partnered to support a complete FPGA development flow combining Mentor Graphic’s Precision® Synthesis FPGA design tools and Veridae’s Certus or Corus validation and debug solutions. The combination of tools will accelerate the development, verification and time-to market of single and multi-FPGA based systems.

“We are thrilled to collaborate with Mentor Graphics to integrate Corus and Certus with the Precision Synthesis tools,” said Jim Derbyshire, Veridae’s chief executive officer. “The … Read More → "Veridae Systems and Mentor Graphics Partner to Accelerate Development, Debug and Verification of FPGAs"

AdaCore and Altran Praxis Release SPARK Pro 10

NEW YORK and PARIS, June 7, 2011 – AdaCore and Altran Praxis today announced the release of the SPARK Pro 10 software development and verification environment, providing a major step forward for the developers of high-assurance systems. SPARK Pro now offers increased flexibility to developers of systems with mixed integrity levels or with the need to integrate SPARK with other languages or legacy code.

SPARK Pro is a product jointly developed by Altran Praxis, international specialist in embedded and critical systems engineering, and AdaCore, the leading provider … Read More → "AdaCore and Altran Praxis Release SPARK Pro 10"

Xilinx to Discuss and Demonstrate Optical Transport Network (OTN) Portfolio at Linley Tech Carrier Conference 2011

SAN JOSE, Calif., June 6, 2011 – Xilinx, Inc. (NASDAQ: XLNX) will showcase its industry leading optical transport network (OTN) portfolio and will discuss how it provides multiple solutions that can help users overcome high bandwidth optical transport network (OTN) challenges at the Linley Tech Carrier Conference at the DoubleTree Hotel in San Jose from June 7 – 8, 2011. During the conference, Xilinx Solution Architect, Communications Business Unit, Shreyas Shah, will explain how FPGAs are addressing increasing bandwidth demands in carrier/optical networking. Shah’s presentation will also cover quality of … Read More → "Xilinx to Discuss and Demonstrate Optical Transport Network (OTN) Portfolio at Linley Tech Carrier Conference 2011"

Texas Instruments MEMS innovation brings IR temperature measurement to portable consumer electronics

DALLAS (June 6, 2011) – Texas Instruments Incorporated (TI) (NYSE:TXN) is enabling contactless temperature measurement for the first time in portable consumer electronics with the industry’s first single-chip passive infrared (IR) MEMS temperature sensor. The TMP006 digital temperature sensor provides manufacturers of mobile devices, such as smartphones, tablets and notebooks, with the ability to accurately measure device case temperature using IR technology. This advancement over the current approach of approximating case temperature based on system temperature will enable system designers to optimize performance while providing a more comfortable user experience. The TMP006 can also be used … Read More → "Texas Instruments MEMS innovation brings IR temperature measurement to portable consumer electronics"

Magma Announces Availability of Titan Analog Design Kit for TSMC 180-nm/65-nm nodes

DESIGN AUTOMATION CONFERENCE, SAN DIEGO, Calif., June 6, 2011 – Magma® Design Automation (Nasdaq: LAVA), a provider of chip design software, today announced immediate availability of the Titan™ Analog Design Kit for TSMC 180-nanometer (nm) and 65-nm processes, that implements Titan’s model-based design methodology with Titan FlexCells, which are modular, process- and specification-independent, reusable analog building blocks. The kit provides an analog design ecosystem that enables mutual Magma and TSMC customers to dramatically improve design quality and designer productivity. 

The Titan Analog Design Kit design kit contains technology independent FlexCells, associated circuit schematics, symbols, … Read More → "Magma Announces Availability of Titan Analog Design Kit for TSMC 180-nm/65-nm nodes"

Imec and Cadence Deliver Automated Solution for Testing 3D Stacked ICs

LEUVEN, Belgium and SAN JOSE, Calif., June 6, 2011—Imec, a world-leading nanoelectronics research institute based in Belgium, and Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced new technology that delivers an automated test solution for design teams deploying 3D stacked ICs (3D-ICs). The technology addresses the test challenges involved as electronics companies increasingly turn to 3D-ICs as a way to increase circuit density and achieve better performance at lower power dissipation for mobile and other applications where space is at a premium.

This imec-Cadence collaboration provides the design-for-test (DFT) and … Read More → "Imec and Cadence Deliver Automated Solution for Testing 3D Stacked ICs"

ARM and Synopsys Sign Multi-Year EDA Tools and ARM® Cortex™-A15 Access Agreements

ARM (LON: ARM; Nasdaq: ARMH), and Synopsys, Inc. (Nasdaq: SNPS) have signed an expanded multi-year agreement extending ARM’s access to Synopsys’ innovative EDA technology. ARM will also provide Synopsys with access to the ARM Cortex-A15 processor to maximize performance and energy efficiency of SoCs built by ARM’s Partners using this advanced ARM processor and Synopsys tools. Both agreements build upon a long history of partnership between the two companies, including ARM’s use of Synopsys EDA tools in the design of the ARM Cortex-A processor family and the experience gained supporting leading ARM Cortex licensees.

Read More → "ARM and Synopsys Sign Multi-Year EDA Tools and ARM® Cortex™-A15 Access Agreements"

Magma Announces Silicon One Initiative – Brings Together Superior Technology, Design Expertise and Customers’ Creativity to Deliver Profit-Driving Differentiated Silicon

DESIGN AUTOMATION CONFERENCE, SAN DIEGO, Calif., June 6, 2011 – Magma® Design Automation (Nasdaq:LAVA), today launched Silicon One, an initiative intended to bring focus to making silicon profitable for customers by providing differentiated solutions and technologies that address business imperatives facing semiconductor makers today – time to market, product differentiation, cost, power and performance. Magma is debuting its solution-oriented Silicon One offerings at the 48th annual Design Automation Conference, opening today in San Diego.

“Some EDA vendors attempt to be all things to all people. They try to lock customers into complete end-to-end flows, … Read More → "Magma Announces Silicon One Initiative – Brings Together Superior Technology, Design Expertise and Customers’ Creativity to Deliver Profit-Driving Differentiated Silicon"

Synopsys and TSMC Collaborate to Deliver Custom Design Solution for 28nm Analog/Mixed-Signal Reference Flow 2.0

MOUNTAIN VIEW, Calif., June 2, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it has collaborated with TSMC to deliver Synopsys’ custom design solution for TSMC’s 28-nanometer (nm) Analog/Mixed-Signal (AMS) Reference Flow 2.0. Part of TSMC’s comprehensive 28nm design infrastructure, the flow delivers new advanced automation capabilities to improve productivity and shorten the design cycle. The new capabilities include both parasitic-aware and Layout Dependent Effect (LDE)-aware design methodologies.

“The AMS Reference Flow 2.0 delivers new analog/mixed-signal design automation capabilities for advanced process … Read More → "Synopsys and TSMC Collaborate to Deliver Custom Design Solution for 28nm Analog/Mixed-Signal Reference Flow 2.0"

Berkeley Design Automation Analog FastSPICE Deployed in TSMC Analog Mixed Signal Reference Flow 2.0

SANTA CLARA, CA, — June 2, 2011— Berkeley Design Automation, Inc., the nanometer circuit verification leader, today announced that TSMC has incorporated the Analog FastSPICE (AFS) Platform in Analog Mixed Signal (AMS) Reference Flow 2.0 for device transient noise analysis targeting TSMC 28 nanometer (nm) process technology. 

“Berkeley Design Automation has added its transient noise analysis features from Analog FastSPICE Platform to TSMC AMS Reference Flow 2.0,” said Suk Lee, director of Design Infrastructure Marketing at TSMC. “Our internal design teams … Read More → "Berkeley Design Automation Analog FastSPICE Deployed in TSMC Analog Mixed Signal Reference Flow 2.0"

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