industry news
Subscribe Now

Eliyan Delivers Industry’s Highest Performing Chiplet Interconnect PHY at 64Gbps in 3nm Process

Working silicon confirms most efficient and flexible multi-die solution for scaling performance and bandwidth in the Gen AI era

SANTA CLARA, Calif. –October 9, 2024 – Eliyan Corporation, credited for the invention of the semiconductor industry’s highest-performance and most efficient chiplet interconnect, today revealed the successful delivery of first silicon for its NuLink™-2.0 PHY, manufactured in a 3nm process. The device achieves 64Gbps/bump, the industry’s highest performance for a die-to-die PHY solution for multi-die architectures. While compatible with UCIe standard, the milestone further confirms Eliyan’s ability to extend die-to-die connectivity by 2x higher bandwidth, on standard as well as advanced packaging, at unprecedented power, area, and latency.

The NuLink-2.0 is a multi-mode PHY solution that also supports UMI (Universal Memory Interconnect), a novel chiplet interconnect technology that improves Die-to-Memory bandwidth efficiency by more than 2x. UMI leverages a dynamic bidirectional PHY whose specifications are currently being finalized with the Open Compute Project (OCP) as BoW 2.1.

The NuLink-2.0 demo vehicle uses standard organic/laminate packaging with 5-2-5 and 8-2-8 stack ups. The highly area efficient NuLink PHY is bump limited and fits not only under 90um bump pitch in standard packaging, but also under 45-55um bump pitches in advanced packaging. It can deliver bandwidth of up to 5Tbps/mm in standard packaging by leveraging innovative reflection and crosstalk cancellation techniques, and up to 21Tbps/mm in advanced packaging at reduced power by leveraging unterminated receivers and simplifying the cancellation circuitry. NuLink’s unprecedented low power makes it an ideal PHY solution that meets the stringent power density requirement of custom HBM4 base die, which is a critical piece of all future AI systems.

The device includes a die-to-die PHY coupled with an adaptor/link layer controller IP to provide a complete solution, aligned with the high-growth AI markets for HPC and edge applications. Lower costs accommodated by utilizing standard packaging can further encourage chiplet-based designs in inference and gaming segments, as well as other adjacent markets as they can be more readily qualified for aerospace, automotive, and demanding industrial markets.

“This milestone sets a new standard in Perf/TCO advantages for implementing a wide range of multi-die use cases,” said Eliyan’s founding CEO Ramin Farjadrad. “The performance alone expands the degrees of freedom for architects working to remove or lessen memory and IO walls. Combined with unprecedented low power consumption and flexibility in packaging technology for market-specific optimization around cost and complexity, we are able to deliver a solution that will help scale chiplet-based design to new levels of capabilities in a diverse range of industries.”

About Eliyan
Eliyan Corporation is leading the chiplet revolution, focusing on a fundamental challenge with scaling semiconductor performance, size, power, and cost to meet the needs of high-performance computing applications. It has developed a breakthrough technology to enable the industry’s highest performing chiplet interconnect for homogenous and heterogenous multi-die architectures using either standard or advanced packaging, enabling increased sustainability through reduction in costs, manufacturing waste and power consumption.  More information can be found here: www.eliyan.com

Leave a Reply

featured blogs
Nov 22, 2024
We're providing every session and keynote from Works With 2024 on-demand. It's the only place wireless IoT developers can access hands-on training for free....
Nov 22, 2024
I just saw a video on YouTube'”it's a few very funny minutes from a show by an engineer who transitioned into being a comedian...

featured video

Introducing FPGAi – Innovations Unlocked by AI-enabled FPGAs

Sponsored by Intel

Altera Innovators Day presentation by Ilya Ganusov showing the advantages of FPGAs for implementing AI-based Systems. See additional videos on AI and other Altera Innovators Day in Altera’s YouTube channel playlists.

Learn more about FPGAs for Artificial Intelligence here

featured paper

Quantized Neural Networks for FPGA Inference

Sponsored by Intel

Implementing a low precision network in FPGA hardware for efficient inferencing provides numerous advantages when it comes to meeting demanding specifications. The increased flexibility allows optimization of throughput, overall power consumption, resource usage, device size, TOPs/watt, and deterministic latency. These are important benefits where scaling and efficiency are inherent requirements of the application.

Click to read more

featured chalk talk

Machine Learning on the Edge
Sponsored by Mouser Electronics and Infineon
Edge machine learning is a great way to allow embedded devices to run applications that can collect sensor data and locally process that data. In this episode of Chalk Talk, Amelia Dalton and Clark Jarvis from Infineon explore how the IMAGIMOB Studio, ModusToolbox™ Software, and PSoC and AURIX™ microcontrollers can help you develop a custom machine learning on the edge application from scratch. They also investigate how the IMAGIMOB Studio can help you easily develop and deploy AI/ML models and the benefits that the PSoC™ 6 Artificial Intelligence Evaluation Kit will bring to your next machine learning on the edge application design process.
Aug 12, 2024
56,189 views