industry news
Subscribe Now

Cadence Accelerates Industrial, Automotive, Hyperscale Data Center, and Mobile SoC Verification with Expanded VIP and System VIP Portfolio

Latest additions enable comprehensive and fast verification to ensure SoCs meet the latest standard specifications

SAN JOSE, Calif., June 1, 2022—Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the availability of 15 new Verification IP (VIP) solutions that enable engineers to quickly and effectively verify their designs to meet the specifications for the latest standards protocols. The new Cadence® VIP offerings empower customers to confidently develop their next-generation industrial, automotive, hyperscale data center and mobile SoCs while keeping pace with the latest industry standards, including LPDDR5x, MIPI® CSI-2® 4.0 and UFS 4.0, and the newest versions of the USB4, Arm® AMBA® 5 CHI and GDDR interfaces.

The new Cadence VIP offer customers a comprehensive verification solution for the most complex protocols. Cadence customers have access to a consistent API across all VIP with complete bus function models (BFMs), integrated protocol checks and coverage models, facilitating rapid adoption. The VIP support multiple application areas and specifications, including:

• Industrial:
o MIPI I3Csm 1.1
o MIPI CSI-2 4.0
o eUSB2 1.2

• Automotive:
o MIPI A-PHYsm 1.0
o MIPI DSI-2sm 2.0
o Flash ONFI 5.0
o CAN XL

• Hyperscale data center:
o CCIX 2.0
o Latest version of AMBA CHI
o Latest version of GDDR

• Consumer and mobile:
o DisplayPort 2.1
o Ethernet 5G
o LPDDR5x
o Latest version of USB4
o UFS 4.0

All Cadence VIP solutions include Cadence TripleCheck™ technology, which provides users with a specification-compliant verification plan linked to comprehensive coverage models and a test suite to ensure compliance with the interface specification. The new VIP also support the expanded Cadence System-Level Verification IP (System VIP), which provides SoC-level test libraries, performance analysis, and data and cache coherency checkers.

“STMicroelectronics has successfully utilized a broad range of Cadence VIP, including Arm AMBA, Memory Models, MIPI I3C and CSI-2, eUSB2 and the advanced Cadence System VIP solution, which enabled us to deliver industry-leading solutions for key projects, including ST Industrial MCUs and MPUs,” said Philippe d’Audigier, system-on-chip hardware design director at STMicroelectronics. “Cadence continues to deliver new VIP offerings and advanced SoC verification technologies that support the latest standards. We look forward to continuing our collaboration to develop our next-generation products.”

“As requirements evolve and demand increases for higher bandwidth, lower power and more effective cache coherency management, new protocols arrive to address these issues,” said Paul Cunningham, senior vice president and general manager of the System & Verification Group at Cadence. “By introducing these 15 new VIP, Cadence provides customers with solutions that ensure they can keep up with evolving standards. Our customers can confirm their designs comply with the standard specifications and application-specific timing, power and performance metrics, providing the fastest path to IP and SoC verification closure.”

The new VIP solutions are part of the broader Cadence verification full flow, which includes Palladium® Z2 emulation, Protium™ X2 prototyping, Xcelium™ simulation, the Jasper™ Formal Verification Platform, the Helium™ Virtual and Hybrid Studio and the vManager™ Verification Management Platform. The Cadence verification full flow delivers the highest verification throughput of bugs per dollar invested per day. The VIP solutions and verification full flow support the company’s Intelligent System Design™ strategy, enabling SoC design excellence. For more information, please visit www.cadence.com/go/NewVerificationIP.

About Cadence
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For eight years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

Leave a Reply

featured blogs
Dec 19, 2024
Explore Concurrent Multiprotocol and examine the distinctions between CMP single channel, CMP with concurrent listening, and CMP with BLE Dynamic Multiprotocol....
Dec 24, 2024
Going to the supermarket? If so, you need to watch this video on 'Why the Other Line is Likely to Move Faster' (a.k.a. 'Queuing Theory for the Holiday Season')....

featured video

Introducing FPGAi – Innovations Unlocked by AI-enabled FPGAs

Sponsored by Intel

Altera Innovators Day presentation by Ilya Ganusov showing the advantages of FPGAs for implementing AI-based Systems. See additional videos on AI and other Altera Innovators Day in Altera’s YouTube channel playlists.

Learn more about FPGAs for Artificial Intelligence here

featured chalk talk

High Power Charging Inlets
All major truck and bus OEMs will be launching electric vehicle platforms within the next few years and in order to keep pace with on-highway and off-highway EV innovation, our charging inlets must also provide the voltage, current and charging requirements needed for these vehicles. In this episode of Chalk Talk, Amelia Dalton and Drew Reetz from TE Connectivity investigate charging inlet design considerations for the next generation of industrial and commercial transportation, the differences between AC only charging and fast charge and high power charging inlets, and the benefits that TE Connectivity’s ICT high power charging inlets bring to these kinds of designs.
Aug 30, 2024
36,124 views