SAN DIEGO, CA. –– June 6, 2011 ––Veridae Systems and the Dini Group today announced they’ve combined Veridae’s Certus FPGA Prototyping Suite with the Dini Group’s prototyping and I/O hardware to deliver a complete platform for multi-FPGA prototyping and debug. The solution is fully tested and available now and will be demonstrated this week at the Design Automation Conference, Veridae booth 3212.
FPGA-based ASIC prototyping is challenging in many regards with the most time and effort spent in debug. Conventional approaches require long, repeated cycles of instrumentation, synthesis, followed by FPGA place & route. Certus dramatically reduces this time by offering a debug platform that encompasses a single, synchronized view of a complex ASIC design. And Certus effortlessly handles this task across multiple FPGAs and multiple clock domains. Signal selection and high-speed troubleshooting is performed without the time intensive cycle of instrumentation/synthesis/FPGA place & route. As a result, engineers can quickly pinpoint unexpected behaviors, correct problems, and rapidly move an ASIC prototype into first mask success.
“Certus is a significant addition to the FPGA prototyping tool flow,” said Mike Dini, president of the Dini Group. “It is the first product of its kind with dynamic signal selection, waveform viewing and other features that will appeal to the most experienced ASIC verification teams. The JTAG interface is generic to all of our large FPGA boards, both Xilinx and Altera. The solution is minimally intrusive.”
Certus runs on Dini boards with one to twenty FPGAs, and designs of up to 130 million ASIC gates can be run at, or near the target silicon speed. All common interfaces are accommodated, and daughter cards provide custom user requirements. The combined solution offers incredible cost savings over traditional methods and speeds time to first silicon.
“We are very pleased to have developed Certus with the Dini Group’s support,” said Jim Derbyshire, Veridae’s chief executive officer. “As a market leader in ASIC FPGA prototyping hardware, Dini supports us with a wide range of Xilinx and Altera based products. The combination of our technologies provides an ideal solution for customers seeking a best-in-class solution to reduce both prototyping time and ASIC time to market.”
The Certus Suite for FPGA prototyping provides a single, fully synchronized and aligned waveform view across all FPGAs and clock domains. Furthermore, Certus can be tightly coupled with your software debugger to accelerate FPGA-based system validation and debug. The Certus suite is based on Veridae’s proven set of software tools that include the Implementor for semi-automated instrumentation of your design; the Analyzer for configuration and capture; and the Investigator for data expansion through signal interpolation.
Certus is available now from Veridae Systems, and the company will support users implementing the suite on a Dini Board to establish an optimal FPGA prototyping and debug solution.
About Dini Group
The Dini Group was established in 1995 as a consulting company. While developing ASICs for various clients they saw the need for cost effective logic emulation platforms and developed several of them. In 1998 they started selling these platforms to ASIC developers and FPGA system users. From their offices in La Jolla, Dini Group employees have supplied over ten billion ASIC gates. The Dini Group corporate headquarters is located at 7469 Draper Ave., La Jolla, CA 92037-5026, phone: (858) 454- 3419. On the Web at: http://www.dinigroup.com
About Veridae Systems Inc.
Veridae Systems Inc. provides innovative debug and validation technology that enables engineers to bring complex systems and ICs from prototype to production while realizing significant savings in both cost and time to market. Veridae is privately held, with technology spun out of research activity at the University of British Columbia (UBC). The company was founded in 2009, and has corporate headquarters at #201-1545 West 8th Avenue, Vancouver, BC, V6J 1T5. More information is available on the web at: http://www.veridae.com/
