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CoFluent Design Joins Cadence’s EDA360 System Realization Alliance And Supports The Incisive Platform

Paris, France – February 15, 2011 – CoFluent Design, a leading Electronic System Level (ESL) company that provides system-level modeling and simulation to accelerate innovation in embedded devices, today announced that the company joined Cadence’s System Realization Alliance

System architects and engineers already use CoFluent Studio – CoFluent Design’s Eclipse-based software toolset – for multiprocessor/multicore hardware/software system modeling and simulation in consumer, communication, automotive and aerospace/avionic electronics. As described in a white paper available on CoFluent Design’s website, CoFluent Studio provides methodology and tools for capturing all aspects of system requirements and facilitating engagement with customers of semiconductor platform providers.

CoFluent Design is an enabler of the EDA360 System Realization vision,” said Stéphane Leclercq, CoFluent Design CEO. “CoFluent Studio is the only tool on the market to allow capturing, validating and optimizing the design intent in an application-driven way. Being application-driven is essential in the EDA360 vision and requires two key success factors: first, enabling mutual understanding and adaptation of application and platform for system-level optimization; second, being capable of translating requirements and constraints into system-level functional and architectural aspects. CoFluent Studio models and tools deliver those two capabilities to application developers and platform providers, and facilitate interactions between both parties.”

Beside architectural studies, CoFluent Studio can be used also to create timed behavioral or functional models from graphics, using either the UML/SysML standards or the CoFluent domain-specific language .

CoFluent Studio translates graphical models into transactional SystemC for hardware modeling and verification. Hardware designers use CoFluent Studio to ease the creation of SystemC transaction-level models:

  • IP models that can’t be found in libraries (proprietary or new IPs for instance);
  • Workload or use case models that mimic end-user applications and drive virtual platform/prototype simulations when embedded application software code is not available yet.

Software designers can also use CoFluent Studio to model real-time software applications and generate embedded C code for prototyping and implementation. 

“CoFluent Design will release shortly an adaptation of its simulation library so the SystemC generated from graphical models captured in CoFluent Studio can be run on the Incisive platform,” said Vincent Perrier, CoFluent Design CTO. “Obtained SystemC models can be either integrated to a larger-scope SoC model through TLM-2 interfaces, or become part of the testbench used for verification or a reference design.”

“Increasing time to market pressures is forcing design houses to rethink ways to get hardware and software on time. Open, standard-based, SystemC TLM models are essential for early software development,” said Ran Avinun, Cadence Product Marketing Group Director for System Design and Verification. “CoFluent’s ability to create SystemC TLM models that are read by the Incisive Enterprise Simulator (IES) is a boon for designers. We are excited to have CoFluent as our System Realization Alliance partner supporting the Cadence ecosystem”.

About CoFluent Design 

CoFluent Design™ provides standards-based system-level modeling and simulation tools for executing use cases and analyzing performance of embedded devices and chips. CoFluent Studio™ generates SystemC transactional models from UML/SysML diagrams and standard C that describe complex multi-OS, multicore embedded systems. CoFluent Reader™ enables efficient exchange of executable specifications with all project stakeholders and contractors.

CoFluent is used throughout the product development lifecycle for:

  • Innovation: capturing with minimal effort the design intent in reusable models that mix new features and legacy, allowing for early patent application
  • Optimization: finding the optimal architecture and power efficiency through design space exploration free of the full hardware/software code
  • Validation: defining use case scenarios for validating the real-time behavior, predicting performance and generating test cases for implementation

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