industry news
Subscribe Now

Jasper Introduces Intelligent Proof Kits For Faster, More Accurate Verification of SoC Interface Protocols

MOUNTAIN VIEW, Calif. – Dec. 14, 2010 – Jasper Design Automation, provider of advanced formal technology solutions, today introduced Intelligent Proof Kits for accelerated certification of advanced SoC interconnect protocols.  Jasper Intelligent Proof Kits encapsulate critical behaviors for popular protocols such as ARM’s AMBA, letting users quickly configure designs to the standard or adapt them to their own custom configuration.  Intelligent Proof Kits are optimized for high-level verification with Jasper’s ActiveDesign™ and JasperGold® formal verification, and designers benefit from these kits especially in combination with Jasper’s unique Visualize technology.

“The next evolutionary step for Proof Kits is to encompass more intelligence, more plug-and-play functionality, more automation and more flexibility,” said Lawrence Loh, Jasper Vice President of Worldwide Applications Engineering.  “We work very closely with our partners to ensure Jasper’s Intelligent Proof Kits match the protocol specs precisely.  In addition, Jasper Proof Kits are easily comprehensible by users, so they can be adapted for proprietary extensions to standard protocols.”

Users can deploy Intelligent Proof Kits from early in the design cycle, all the way through verification.  Automated features allow for rapid integration into the design. Users can visualize selected properties and analyze timing diagrams to understand property behaviors, and cross-reference to the specifications through ActiveDesign, and the design protocol properties can then be seamlessly proven in JasperGold formal verification.

Availability

Jasper Intelligent Proof Kits ship unencrypted with original source code to facilitate user customization and insights into the protocols themselves.  Jasper is initially rolling out Intelligent Proof Kits for AMBA 3 and AMBA 4, followed closely by DFI, DDR and LPDDR
versions.

About Jasper Design Automation

Jasper delivers industry-leading EDA software solutions for semiconductor design, verification, and reuse, based on the state-of-the-art formal technology. Customers include worldwide leaders in wireless, consumer, computing, and networking electronics, with over 150 successful chip deployments.  Jasper, headquartered in Mountain View, California, is privately held, with offices and distributors in North America, South America, Europe, and Asia.  Visit www.jasper-da.com to reduce risks; increase design, verification and reuse productivity; and accelerate time to market.

Leave a Reply

featured blogs
Dec 19, 2024
Explore Concurrent Multiprotocol and examine the distinctions between CMP single channel, CMP with concurrent listening, and CMP with BLE Dynamic Multiprotocol....
Dec 20, 2024
Do you think the proton is formed from three quarks? Think again. It may be made from five, two of which are heavier than the proton itself!...

featured video

Introducing FPGAi – Innovations Unlocked by AI-enabled FPGAs

Sponsored by Intel

Altera Innovators Day presentation by Ilya Ganusov showing the advantages of FPGAs for implementing AI-based Systems. See additional videos on AI and other Altera Innovators Day in Altera’s YouTube channel playlists.

Learn more about FPGAs for Artificial Intelligence here

featured chalk talk

Shift Left Block/Chip Design with Calibre
In this episode of Chalk Talk, Amelia Dalton and David Abercrombie from Siemens EDA explore the multitude of benefits that shifting left with Calibre can bring to chip and block design. They investigate how Calibre can impact DRC verification, early design error debug, and optimize the configuration and management of multiple jobs for run time improvement.
Jun 18, 2024
46,571 views