Sunnyvale, CA. — October 5, 2010 — Mirabilis Design Inc., a Silicon Valley software provider of system-level modeling and simulation solutions, announces the release of VisualSim Architect 10.3. This release has Model Templates for over 120 applications including multi-core; SoC and avionics power management; Network-on-Chip (NoC); high-performance storage; and real-time software design. Mirabilis Design is also announcing a new infrastructure with user-customizable graphical interface, new modeling components and interactive documentation.
Our user community has already realized massive productivity improvements from this release. The new NoC Template was used by a large Wireless Semiconductor company to model a Gigahertz-range multimedia SoC in approximately three weeks. Similarly, the Serial Switch Template was used by a NASA center to extend the current technology with proprietary extensions to meet higher performance and reliability levels for Space Applications.
Infrastructure:
The infrastructure updates to VisualSim improves product time-to-market and create a uniform experience on all OS platforms.
- A common look-and-feel, icons and menus
- Accelerates simulation speed by over 20%
- Reduced memory usage with New Memory Manager for large multi-day simulations
- New block validation methodology that tightly integrates product development with documentation
- Enhanced debugging environment through improved messages and recommendations
Application Templates:
Early feedback indicates that there is a 15X increase in productivity through the use of our new application templates.
- Fully built models combined with analysis reports represents 30-70% of a completed system specification
- 10 additional blocks contain built-in dynamic power management capabilities
- Introduced a library of 120 application templates to jumpstart model development
- Templates help train and accelerate development in new applications such as multi-core systems, custom RTOSs, and FPGA-based multi-board systems
- Augment user documentation with example models for over 90% of the library blocks
Ease-of-Use:
Mirabilis Design has migrated to a new documentation development methodology. The documentation and the Templates streamline the development process and compress the product schedule.
- Block documentation with integrated video, audio, slides, context-sensitive, search engines, and hierarchical listings
- New documentation to match library blocks and application-scenarios
- Get answers to a specific question in 3 clicks or less.
Availability
VisualSim Architect 10.3 is currently available on Windows, Linux, MAC OS and all other forms of UNIX.
Webinar
Mirabilis Design will be conducting 30-minute online Webinars on October 20th at 8 AM and 11 AM PST to introduce this new release and provide an introduction to system-level modeling. Attendees can register here (http://www.mirabilisdesign.com/Pages/Evaluation/mdi_103_Webinar.html) to attend these Webinars.
About Mirabilis Design
Mirabilis Design is a Silicon Valley company, providing software solutions to identify and eliminate risk in the product specification; accurately predict the human and time resources required to develop the product; and improve communication between diverse engineering teams. VisualSim Architect is a system-level modeling, simulation, and analysis environment using a complete set of libraries and application templates that significantly improve model construction and analysis time. The environment enables designers to rapidly converge to a design which meets a diverse set of interdependent time- and power requirements. It is optimally used very early in the design process in parallel with (and as an aid to) the development of the product’s written specification and long before an implementation (e.g., RTL, software code, or schematic) of that product can even be started. The diverse industrial applications to which our customers have applied VisualSim Architect include, but are not limited to, optimizing network configurations, predicting hardware performance on massively multi-core systems, optimizing SOC power control mechanisms, development of spacecraft control systems, and converging to an optimal topology for network-on-chip SOCs.
