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CoFluent Design Delivers Graphical Specification And VAlidation Solution For The Questa Functional Verification Platform

Tokyo, Japan – JANUARY 28, 2010 – CoFluent Design™, a leading Electronic System Level (ESL) company that provides system-level modeling and simulation to accelerate innovation in embedded devices, today announced that CoFluent Studio™ allows the creation and automatic generation of SystemC models and test cases for the Mentor Graphics Questa® functional verification platform.

CoFluent Studio helps hardware designers answer the following question: – How to specify a hardware component and validate its specification? It allows designers to create executable specifications of an integrated circuit (IC) by modeling its functionality and use cases using simple yet powerful graphical notations. Graphics are used to describe blocks, data and control flows.

Algorithms are defined with ANSI C code and given an execution time budget (number of cycles). Simulations are driven by use cases for validating the model behavior and time properties. The automatic SystemC transaction-level modeling (TLM) code generation allows reuse of IC and use case models for validating the register-transfer level (RTL) implementation in Questa. “Graphical notations in CoFluent Studio really help in the creation and validation of new innovative applications,” said Vincent Perrier, Co-founder and Director of CoFluent Design. “Once validated, executable models can be used as reference for RTL implementation and verification.”

Another key to success is efficient specifications hand-off to design teams, whether in-house or subcontracted, and RTL validation against the initial specifications and use cases. “CoFluent executable specifications are incredibly more efficient than paper specifications as subcontractors can view the models sent by their customers and replay simulations with the CoFluent Reader. This is of great help to understand the design intent and obtain reference behaviors and timings,” added Vincent Perrier.

The generated SystemC test case can be used as testbench for validating the register-transfer level (RTL) implementation within the Questa functional verification platform. A SystemVerilog testbench can also be used to validate in parallel the reference SystemC TLM model and its RTL implementation written in VHDL or Verilog within the Questa functional verification platform.

CoFluent Design has joined the Mentor Graphics Questa Vanguard Program (QVP) and adapted its simulation library to Questa’s SystemC kernel. The new CoFluent SystemC Library (SCL) for the Questa functional verification platform is available now in pre-release and will be generally available this quarter as an addition to the upcoming v3.2 release of its CoFluent Studio integrated modeling environment.

“We want to extend a warm welcome to CoFluent as they join the growing Questa Vanguard Program. We believe collaboration with partners is pivotal to moving the state of design and verification to the next level,” said Dennis Brophy, Director of Strategic Business Development, Mentor Graphics. “We’re also quite impressed with CoFluent’s progress on their integration with the Questa functional verification platform.”

CoFluent Design exhibits at the Electronic Design and Solution Fair (EDSFair) 2010 in Yokohama, Japan, on January 28 and 29, 2010.

About CoFluent Design:

CoFluent Design™ provides system-level modeling and simulation tools that enable embedded device and chip designers to imagine and validate new concepts and architectures. CoFluent Studio™ generates SystemC transactional models from graphics and standard C that describe complex multi-OS, multi-core systems in consumer electronics and telecoms. CoFluent Reader™ enables efficient exchange of executable specifications with all project stakeholders and contractors.

CoFluent is used throughout the product development lifecycle for:

  • Innovation: capturing with minimal effort the design intent in reusable models that mix new features and legacy, allowing for early patent application
  • Optimization: finding the optimal architecture and power efficiency through design space exploration free of the full hardware/software code
  • Validation: defining use case scenarios for validating the real-time behavior, predicting performance and generating test cases for implementation

For further details please visit:

http://www.cofluentdesign.com or send an email to info@cofluentdesign.com

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