The whole idea of programmability is to gain flexibility and expanded utility. Ultimately, the perfect programmable platform would be a “one-size-fits-all” affair, where you could buy the universal development kit and embark on engineering anything from a wireless base station to a video surveillance application without any additional hardware or software.
Of course, we don’t live in the ideal world. We live in the real one where design disciplines are increasingly specialized, and the very notion of a universal design platform becomes ever more difficult to achieve. That’s why, even as Xilinx works to consolidate their plethora of platforms down to a manageable number of design kits, they are expanding their line of DSP-related “Targeted Design Platforms” to three – with each one serving a different designer “persona” and excelling in a different design methodology.
This week, Xilinx announced three platforms for DSP design based on their Virtex-6 and Spartan-6 FPGA families. These kits support a wide range of application performance targets – from a “high-end” Virtex-6 kit that includes integrated AD/DA capability with a theoretical maximum processing power of 1 TMACs (1 Tera Multiply Accumulate per second – yeah, that’s a lot. Remember, though, that it’s “theoretical” — more on that later), to a Spartan-6 kit with more DSP performance than most of us can use, to a combination kit with a conventional DSP paired with a Spartan-6 FPGA that gives us a “gateway drug” to FPGA-based signal processing.
What these kits have in common is an increasingly simple set of design options – whether you want to go Old School and do your DSP with HDL, or whether you’re head is stuck in Matlab and you’d rather not leave – preferring to do your hardware design with a model-based approach using Simulink, or whether you’re one of the brave and well-funded souls who is ready to take advantage of the enormous power of high-level synthesis of DSP hardware directly from C or C++.
Xilinx has been doing DSP for a long time now, and the feedback loop from customers to the next iteration of tools and development kits is showing. Obviously, the company has learned that FPGA-based DSP design is not a one-size-fits-all operation, and they have identified several distinct personalities as the target customers for their Targeted Design Platforms. We see two big ones: First, the FPGA designer that is incorporating signal processing into their hardware design. Second, the conventional DSP user who has been pushed toward FPGA-based (or FPGA-assisted) processing due to performance requirements.
The first group has always been the easy one for FPGA companies. The FPGA designer already understands hardware design concepts, is comfortable using HDL to express design intent, and just needs the right hardware (a bunch of DSP/multiplier blocks and a ton of RAM) to get the job done. Datapath construction, controller optimization, resource sharing, parallelism, and pipelining are all familiar and easy concepts for this designer, and therefore FPGA companies have always had easy success getting this crowd to embrace the DSP side of FPGA.
The second group remains the biggest challenge. Conventional DSP users are, more often than not, software-oriented people. They think in terms of taking sequential algorithms and using parallelism for a performance boost, rather than conceiving algorithms that are inherently parallel to begin with. They don’t tend to like hardware description languages at all, and the idea of having to create a hardware logic design in order to get the performance they need is somewhere between terrifying and simply distasteful. If they could get the results they need from a conventional DSP processor, they would continue to do just that. Since they can’t, they are now dragged kicking and screaming into the frightening world of FPGA design. In other words, not really where you want to start with a new customer.
The three new kits: Virtex-6 FPGA DSP Kit with Integrated AD/DA, Spartan-6 FPGA DSP Kit, and Spartan-6 FPGA/OMAP Co-processing Kit – all show an understanding of the divergent needs of these two groups of designers. There is no argument that FPGAs are amazingly adept at signal processing – boasting huge advantages on every axis where DSP processing power is in the numerator, and things like cost, board area, or power consumption are in the denominator. Where FPGAs have not historically excelled in DSP is when “design effort” is in the equation. It’s just plain harder to get your DSP going in an FPGA than it is with a conventional DSP processor.
But that situation is changing, on both sides. As they grow more complex to meet the needs of higher-performance applications, DSP processors are becoming more difficult to program – at least if you want to take advantage of all the performance-oriented bells and whistles. Developing a coding style that will give you the best results out of a DSP is certainly an art, and that art is becoming more subtle with every generation of processor. On the FPGA side, the programming part continues to get easier. If you don’t like HDL, there are two reasonable options available – using “model-based design” where you assemble your algorithm from optimized building blocks in a tool like Simulink, or writing your algorithm in C or C++ and letting a high-level synthesis tool convert that into the hardware implementation you need.
Make no mistake, there is still a gap in ease-of-programming, and the conventional DSP is still on the winning end, but as your performance requirements increase, that gap is becoming steadily smaller – and for many applications a conventional DSP solution is no longer an option.
Xilinx’s new high-end DSP kit – the Virtex-6 version – is aimed at the “no other option” applications like 3D medical imaging, HD and 3D Audio/Video broadcast, radar, sonar, and wireless infrastructure MIMO. The folks doing these applications have no illusion that FPGAs are an “option.” FPGA-based implementation is currently the only way they’ll get their applications done given performance, schedule, and budget constraints. In that spirit, the new kit provides way more goodies than previous generations. Simply the move up to Virtex-6 brings more DSP resources to the table than before – more multiply/accumulate hardware, more memory, more IO bandwidth for getting data onto and off of the chip, and more fabric for whatever else is going on in your design. In addition, the AD/DA module that plugs in via the now-ubiquitous FPGA Mezzanine Card (FMC) slot eliminates another major design headache.
The idea of the kit is to shorten the overall design process by giving us the basic parts of our system already working. We get a development board with the AD/DA card, a great selection of IP, reference designs, and tool support. The goal is to enable us to pop the kit out of the box and have something working on day 1.
The second kit – based on the Spartan-6 FPGA – is aimed at developers of applications like portable ultrasound, consumer video, and software-defined radio (SDR). These applications don’t have the extreme performance requirements of the first group, and they are also more cost- and power-sensitive.
The final kit – the co-processing kit with a Spartan-6 combined with a TI OMAP L-138 – allows DSP designers to continue with their usual software-based development methodology, but with the option to pull out the more demanding sections of their design for FPGA-based acceleration. This extends the life of the traditional DSP processor and of the traditional DSP expert by supporting a combination of conventional and FPGA-based techniques to co-exist. Designers that are already comfortable with the TI DSP development flow can start their process as usual, and they don’t have to completely switch gears when they need that extra bump of performance from an FPGA.
The Virtex-6 FPGA DSP Kit is the most expensive – at $3995 USD, followed by the Spartan-6 kit at $1995, and the Spartan-6 OMAP kit at $1695. All three are available for order entry immediately.
