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Extreme Compilers for Extreme Architectures

ACE calls them “extreme architectures.” These are the processors that your mother told you to avoid because they’re just too darn hard to support. You can come up with the niftiest hardware features, but who’s going to figure out how to turn C code into something that will take advantage of them?

Well, ACE would say, “Don’t listen to your mother.” Their CoSy tool (I keep wanting to pronounce this “Co-Sigh,” you know, kind of like when you both lay back and realize that you … Read More → "Extreme Compilers for Extreme Architectures"

Sensor Fusion: DIY or Turnkey?

Sensor fusion was the name of the game this year at Sensors Expo (especially the MIG pre-conference event). But at least two of the visible players in this space are going about it two different ways.

We’ve seen Movea moving in a direction of giving control to system designers through tools. The idea here is that a system integrator will pull sensors together and assemble custom fusion algorithms from building blocks. Key to the success of this model is the assumption that … Read More → "Sensor Fusion: DIY or Turnkey?"

SystemC HLS Optimizes Power

Forte occupies what you might call a middle level in logic synthesis. We’ve talked about the positioning before, but a concise way of looking at it might be as follows:

  • ANSI C/C++ provides an unstructured, untimed description of the design.
  • SystemC provides a structured, untimed description of the design.
  • RTL provides a structured, timed description of the design.

The middle one isn’t quite that simple: the interfaces are timed, either … Read More → "SystemC HLS Optimizes Power"

More Than Power Structures

With the multi-domain power beasts being designed into today’s SoCs, it’s easy to miss a detail. Which is why verification is so much more important than it used to be, when inspection and a spreadsheet or two might have gotten you through.

So today you can get verification tools to help you to ensure that the voltages are right and that level shifters and isolation are all in place. But, in a recent announcement, Jasper claims to take things one step further: In addition to verifying the static structure of the power edifice, … Read More → "More Than Power Structures"

The Next OCTEON

Cavium has recently announced the latest in their OCTEON line: following OCTEON II is OCTEON III. (Betcha didn’t see that one coming.) If there’s one major theme that seems to underlie their motivations for this family it’s that high-end functionality is moving to the low end. Specifically, in this case, the low end means enterprise access points and service provider gateways. The classic edge.

In particular, they appear very focused on security and network-attached storage. Security has traditionally been done elsewhere; NAS is on the ascendant.

For those of … Read More → "The Next OCTEON"

Another New Analog Player

On the heels of BDA’s characterization tool, and consistent with increased activity in the analog space, yet another analog tool company is starting up: G-Analog. And it would appear that the essence of their differentiation lies in three letters: GPU.

They’re taking on some of the compute-intensive aspects of analog/SPICE, starting with GChar for characterization and Monte Carlo/OCV analysis. And they’re … Read More → "Another New Analog Player"

New Process Modeling Mechanism

Simulation is all about using the simplest possible modeling technique that gives enough accuracy to make the results useful. Simplicity typically speeds up simulation – and, in many cases, makes the problem tractable in the first place.

But at some point, the unnecessary details that the modeling abstractions hide become necessary. At that stage, if you’re lucky, you can tweak your modeling technique to allow for the now-important effects. But eventually you may to have to take a new approach.

This is what’s happened for certain very specific processes that Coventor& … Read More → "New Process Modeling Mechanism"

MEMS Measurement Standards

Consistent with a move towards standards in MEMS, NIST has released two reference chips that fabs can use to cross-check their measurement techniques. There are several critical parameters unique to MEMS, and five of them are captured by this 5-in-1 reference. NIST has done its own measurements, and the idea is to replicate the results they got. The chips are available for sale ($1735), along with the results for comparison.

The five tests covered are:

Building Better Wizards

Wizards are becoming more and more prevalent. Lest you’re concerned that Dumbledore’s relatives are coming to exact revenge, fear not: we speak here of wizards in the GUI (as opposed to gooey) sense. Yes, there are bastions of holdouts that cling to command line interfaces as a measure of their hacker bona fides, but there are solid reasons to like a well-designed wizard.

And “well-designed” is the operative phrase here. You may think of a wizard as no more than a way to simplify processes that could just as effectively be … Read More → "Building Better Wizards"

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