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Lip-Bu Tan steps into the Intel CEO role. Can he save the company?

The question in my headline is a bit of a tease. Intel doesn’t need saving, per se, but its reputation sure needs a makeover, and the company’s new CEO – Lip-Bu Tan – certainly has the chops and smarts to rebuild the financial community’s and the electronics industry’s trust in the once (and future?) semiconductor leader. Many pundits have opined already about Intel’s new … Read More → "Lip-Bu Tan steps into the Intel CEO role. Can he save the company?"

Speeding AI and HPC Workloads with Composable Memory and Hardware Compression / Decompression Acceleration

Sometimes I try to capture a column’s intent in a short, snappy title using pithy prose, as it were. I might attempt an aphoristic or epigrammatic turn of phrase while trying not to appear gnomic (which—as we now see—is something I reserve for my opening sentence).

In this case, however, my Speeding AI and HPC Workloads with Composable Memory … Read More → "Speeding AI and HPC Workloads with Composable Memory and Hardware Compression / Decompression Acceleration"

Want to know the future of new memories (MRAM, FRAM, PCM)? Tom Coughlin and Jim Handy make predictions

I’ve been following alternative and persistent memory technologies for 40 years. Back in the 1980s, all we had for semiconductor memory was SRAM, DRAM, EPROM, and {non-Flash) EEPROM. During the late 1980s, when I first transitioned from working as an engineer to an editor for an electronics publication, I wrote about nascent, low-capacity, persistent memories offered by two companies located in Colorado Springs: ferroelectric memory (FRAM) made … Read More → "Want to know the future of new memories (MRAM, FRAM, PCM)? Tom Coughlin and Jim Handy make predictions"

Disrupting AC-DC and DC-DC Power Delivery from Data Centers to the Edge

Believe it or not, I have been known to waffle just a tad before getting to the point. So, suppose we flip things round. What would you say if I told you I was just introduced to AC-to-DC and DC-to-DC converters that dispense with things like bridge rectifiers, electrolytic capacitors, and inductors, and replace everything with small, cost-effective solid-state equivalents?

Now that I … Read More → "Disrupting AC-DC and DC-DC Power Delivery from Data Centers to the Edge"

Doug Sparks Takes a Raw and Honest Look at the Chinese Semiconductor Industry

After working in and around China’s semiconductor industry for a decade, Doug Sparks wrote a book about his experiences. The book’s title, “A Decade in the Chinese Semiconductor Industry: An American’s Story,” says it all, while only vaguely describing the 377-page book’s contents. That’s because only a small fraction of the book focuses on the state of China’s semiconductor industry. Instead, … Read More → "Doug Sparks Takes a Raw and Honest Look at the Chinese Semiconductor Industry"

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Mar 20, 2025
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chalk talks
FPGA-based Prototyping with the Latest High-Capacity FPGA Enables New Use Modes – Siemens  FPGA-based prototyping is an essential tool for any SoC and digital chip design and verification. In this episode of Chalk Talk, Juergen Jaeger from Siemens and Amelia Dalton explore the multitude of benefits of the Veloce proFPGA CS platform from Siemens. They also investigate the debug capabilities, software prototyping and scalable hardware of this … Read More → "FPGA-based Prototyping with the Latest High-Capacity FPGA Enables New Use Modes – Siemens"
Calibre DesignEnhancer: Layout Modifications that Improve your Design – Siemens  In this episode of Chalk Talk, Jeff Wilson from Siemens and Amelia Dalton investigate the variety of benefits that the Calibre DesignEnhancer brings to IC design and how this tool suite can be used to find and fix critical design stage issues. They also explore how the Calibre DesignEnhancer can Identify and resolve issues … Read More → "Calibre DesignEnhancer: Layout Modifications that Improve your Design – Siemens"
Vector Funnel Methodology for Power Analysis from Emulation to RTL to Signoff – Synopsys  The shift left methodology can help lower power throughout the electronic design cycle. In this episode of Chalk Talk, William Ruby from Synopsys and Amelia Dalton explore the biggest energy efficiency design challenges facing engineers today, how Synopsys can help solve a variety of energy efficiency design challenges and how the shift left methodology … Read More → "Vector Funnel Methodology for Power Analysis from Emulation to RTL to Signoff – Synopsys"
Accelerating Tapeouts with Synopsys Cloud and AI — Synopsys  In this episode of Chalk Talk, Amelia Dalton and Vikram Bhatia from Synopsys explore how you can accelerate your next tapeout with Synopsys Cloud and AI. They also discuss new enhancements and customer use cases that leverage AI with hybrid cloud deployment scenarios, and how this platform can help CAD managers and engineers reduce … Read More → "Accelerating Tapeouts with Synopsys Cloud and AI — Synopsys"
SLM Silicon.da Introduction — Synopsys  In this episode of Chalk Talk, Amelia Dalton and Guy Cortez from Synopsys investigate how Synopsys’ Silicon.da platform can increase engineering productivity and silicon efficiency while providing the tool scalability needed for today’s semiconductor designs. They also walk through the steps involved in a SLM workflow and examine how this open and extensible platform … Read More → "SLM Silicon.da Introduction — Synopsys"
Shift Left with Calibre — Siemens  In this episode of Chalk Talk, Amelia Dalton and David Abercrombie from Siemens investigate the details of Calibre’s shift-left strategy. They take a closer look at how the tools and techniques in this design tool suite can help reduce signoff iterations and time to tapeout while also increasing design quality. Click here for more … Read More → "Shift Left with Calibre — Siemens"