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Only the Most Epic Embedded Online Conference Ever!

The value of online (virtual) conferences is increasing in leaps and bounds as travel becomes more problematic and time is increasingly at a premium. Some of these events “stand proud in the crowd,” as it were. Allow me to expound, elucidate, and explicate. 

When it comes to embedded space (where no one can hear you scream), the virtual extravaganza on … Read More → "Only the Most Epic Embedded Online Conference Ever!"

Findchips: From Engineer’s Hack to Advanced Component Search Engine

As I may have mentioned on occasion, one of my favorite science fiction movies is the 1982 American-Hong Kong dystopian science fiction movie Blade Runner, which was directed by Ridley Scott and is often rated as one of the greatest sci-fi films ever (it was based on the book Do Androids Dream of Electric Sheep by Philip K. Dick).

The … Read More → "Findchips: From Engineer’s Hack to Advanced Component Search Engine"

Lip-Bu Tan steps into the Intel CEO role. Can he save the company?

The question in my headline is a bit of a tease. Intel doesn’t need saving, per se, but its reputation sure needs a makeover, and the company’s new CEO – Lip-Bu Tan – certainly has the chops and smarts to rebuild the financial community’s and the electronics industry’s trust in the once (and future?) semiconductor leader. Many pundits have opined already about Intel’s new … Read More → "Lip-Bu Tan steps into the Intel CEO role. Can he save the company?"

DVCon 2025: Everything You Want to Learn about Design and Verification

In this week’s Fish Fry podcast, I discuss design and verification with Tom Fitzpatrick – General Chair of DVCon 2025. Tom and I explore this year’s expo and conference, the motivation behind the creation of the second DVCon keynote, the details of the Poster Warrior session and why Tom is especially excited about this year’s conference. I also check out new magnetic microrobots developed by … Read More → "DVCon 2025: Everything You Want to Learn about Design and Verification"

Predictions for Multi-Die System Designs in 2025

There’s a famous saying along the lines of, “Predicting things is difficult, especially about the future.” This quote has been attributed to many people, including Mark Twain, Niels Bohr, and Yogi Berra. In Yogi’s case, however, it’s usually phrased as, “It’s tough to make predictions, especially about the future.”

I know that when I staggered into the current millennium, … Read More → "Predictions for Multi-Die System Designs in 2025"

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featured blogs
Apr 4, 2025
Gravitrams usually employ a chain or screw lift to hoist their balls from the bottom to the top, but why not use a robot?...
chalk talks
Accelerating Time to Fault Campaign Success with Siemens EDA — Siemens  In this episode of Chalk Talk, Ann Keffer and Robert Serphillips from Siemens and Amelia Dalton explore how the Siemens EDA functional safety platform can guide your team through the complete ISO 26262 lifecycle. They also examine the benefits that the Veloce Fault App brings to automotive IC designs and how you can take … Read More → "Accelerating Time to Fault Campaign Success with Siemens EDA — Siemens"
FPGA-based Prototyping with the Latest High-Capacity FPGA Enables New Use Modes – Siemens  FPGA-based prototyping is an essential tool for any SoC and digital chip design and verification. In this episode of Chalk Talk, Juergen Jaeger from Siemens and Amelia Dalton explore the multitude of benefits of the Veloce proFPGA CS platform from Siemens. They also investigate the debug capabilities, software prototyping and scalable hardware of this … Read More → "FPGA-based Prototyping with the Latest High-Capacity FPGA Enables New Use Modes – Siemens"
Calibre DesignEnhancer: Layout Modifications that Improve your Design – Siemens  In this episode of Chalk Talk, Jeff Wilson from Siemens and Amelia Dalton investigate the variety of benefits that the Calibre DesignEnhancer brings to IC design and how this tool suite can be used to find and fix critical design stage issues. They also explore how the Calibre DesignEnhancer can Identify and resolve issues … Read More → "Calibre DesignEnhancer: Layout Modifications that Improve your Design – Siemens"
Vector Funnel Methodology for Power Analysis from Emulation to RTL to Signoff – Synopsys  The shift left methodology can help lower power throughout the electronic design cycle. In this episode of Chalk Talk, William Ruby from Synopsys and Amelia Dalton explore the biggest energy efficiency design challenges facing engineers today, how Synopsys can help solve a variety of energy efficiency design challenges and how the shift left methodology … Read More → "Vector Funnel Methodology for Power Analysis from Emulation to RTL to Signoff – Synopsys"
Accelerating Tapeouts with Synopsys Cloud and AI — Synopsys  In this episode of Chalk Talk, Amelia Dalton and Vikram Bhatia from Synopsys explore how you can accelerate your next tapeout with Synopsys Cloud and AI. They also discuss new enhancements and customer use cases that leverage AI with hybrid cloud deployment scenarios, and how this platform can help CAD managers and engineers reduce … Read More → "Accelerating Tapeouts with Synopsys Cloud and AI — Synopsys"
Shift Left Block/Chip Design with Calibre — Siemens EDA   In this episode of Chalk Talk, Amelia Dalton and David Abercrombie from Siemens EDA explore the multitude of benefits that shifting left with Calibre can bring to chip and block design. They investigate how Calibre can impact DRC verification, early design error debug, and optimize the configuration and management of multiple jobs for … Read More → "Shift Left Block/Chip Design with Calibre — Siemens EDA"