Welcome to the first ever (perhaps only) annual FPGA awards – the Fibbies. This year, 2025, marks the 40^th year of the FPGA’s appearance in the electronics industry, when Xilinx introduced its first FPGA, the XC2064. The Fibbie awards celebrate actual and dubious achievements in the FPGA market during 2024. I got the idea for these awards after seeing a video for the top ten something or others on YouTube. The people, companies and products in the world of FPGAs certainly deserve some attention, and some awards, so let’s see what we have for the year that’s just ended.

These awards are based entirely on my own opinions, and I expect that many of you will disagree with me. That’s great. Please post your critiques and your own award nominations. Please keep it clean. Any comment that crosses the lines of civility is likely to disappear into cyberspace.

FPGA of the Year: High-End Division

The pinnacle of FPGA design requires the most engineering to produce devices that sell at stratospheric prices. Currently, the crème de la crème, in my opinion, is the small group of RF-enabled FPGAs. These devices appeal to a rarefied audience in a few categories: military/aerospace, communications, and T&M (test and measurement).

There are only two contestants in this category: Altera and AMD. From AMD, we had already seen the release of the Zynq UltraScale+ RFSoC in 2017, back when the company announcing this development was called Xilinx. The RFSoC is a monolithic device with integrated, high-speed ADCs and DACs that can be used for direct RF conversion. The ADCs in this family started with a maximum sample rate of 4 Gsamples/sec and, over time, have improved to the point where the Zynq RFSoC DFE’s ADC can operate at 6 Gsamples/sec. AMD announced the Zynq RFSoC DFE in 2023. Based on their capabilities, these RFSoCs are aimed primarily at the mobile phone and radio equipment markets.

Altera, when it was still Intel, had a different sort of customer in mind when it announced the Agilex 9 Direct-RF series of FPGAs in 2023. The Agilex 9 FPGAs are chiplet-based devices. One or two of those chiplets contain 10-bit ADCs and DACs capable of 64Gsamples/sec conversion rates. These are high-end, high-priced devices aimed primarily at the military/aerospace market, although they’re capable of fitting into a variety of applications that need high-speed analog conversion.

In late 2024, AMD took another swing and announced its next entrant in the RF-enabled FPGA game, the Versal RF FPGA with 14-bit ADCs capable of operating at 32 Gsamples/sec. These monolithic devices are aimed at a variety of markets, including the military/aerospace realm (phased-array radar, military communications, EW (electronic warfare), spectrum management, CEMA (cyber electromagnetic activities), and SIGINT (signal intelligence) – plus satellite communications and test and measurement.

I’d love to give AMD a 2024 Fibbie for announcing the Versal RF FPGA, but samples won’t be available until the end of 2025 and production silicon won’t be available until 2027. Maybe in 2025?

FPGA of the Year: Low-End Division

At the opposite end of the spectrum, we have FPGAs that manufacturers euphemistically label “cost-optimized.” What they mean is these devices are “cheaper” than their other FPGAs. Altera announced its low-end Agilex 3 FPGAs in late 2023 and provided a bit more information about the devices during Innovator’s Day in late 2024. These devices are part of Altera’s move to migrate all of its programmable logic to the Agilex brand with a more unified architecture up and down the line. The Agilex 3 FPGAs should become a worthy replacement to the very old Cyclone FPGA family. However, Altera announced the Agilex 3 devices in 2023, and I don’t expect to see the parts become available until later in 2025, so I don’t think it’s appropriate to award a 2024 Fibbie to Altera for its Agilex 3 FPGAs. Hollywood doesn’t award Oscars to movies that haven’t been made yet.

Similarly, AMD announced the Spartan UltraScale+ FPGA family in March, 2024. The Spartan series of low-cost, er, cost-optimized FPGAs has long been a favorite of designers, and I expect the Spartan UltraScale+ devices, based on TSMC’s 16nm FinFET process, to be no exception. Unfortunately, Spartan UltraScale+ devices won’t be available until the middle of 2025, so again, I don’t think it’s appropriate to award a 2024 Fibbie to AMD for its Spartan UltraScale+ FPGAs.

With all these pre-announced devices, it’s very refreshing to see Lattice Semiconductor announce low-end FPGAs with immediate sample availability. Very late in 2024, Lattice announced a new FPGA platform called Nexus 2, which is based on TSMC’s 16nm FinFET process node. The first FPGAs to be based on the Nexus 2 platform belong to the Certus-N2 FPGA family. These FPGAs – from the smallest device with 65K system logic cells, 120 18×18-bit DSP blocks, and four 16Gbps SerDes ports to the largest device with 220K system logic cells, 520 18×18-bit DSP blocks, and eight 16Gbps SerDes ports – constitute an excellent candidate for the low-end FPGA Fibbie award, which I am happy to bestow on Lattice.

FPGA of the year: Software Division

Quite frankly, I hear nothing but bad things about FPGA development software from developers. The FPGA industry is, in reality, a software business backed by some very innovative silicon, but the software developers at FPGA companies continue to rediscover things that were dealt with long ago by the EDA companies catering to the needs of ASIC and ASSP designers. For the industry’s provincial approach to developing EDA software for its FPGAs, I’m happy to make no Fibbie award. If these awards had been around from the beginning, this year would mark the 40^th year of no award in this category.

FPGA of the Year: AI Division

This is a joke category. FPGAs are routinely used to prototype and explore new AI/ML architectures. Then, as soon as a solid architecture is identified, developers go straight to ASICs. Previous Fibbie joke categories included the Networking Division, the Bitcoin Mining Division, and the ADAS Division. When will they ever learn?

FPGA Person of the Year

In this final category, I’m giving the award to someone, not for what they’ve done but for something they’re attempting to do. Back in late 2023, Intel announced that it would spin out its FPGA group, Intel PSG. On February 29, 2024 – Leap Day – Intel announced that it had spun out Intel PSG and had given the group back its old name: Altera. Intel also announced that Sandra Rivera was the CEO of the new, wholly owned subsidiary. Previously, Rivera led Intel’s Data Center and AI (DCAI) Group, where she was responsible for the development of Intel’s data center products, including Xeon processors, the Max and Flex series graphic processors, Gaudi AI accelerators, and FPGAs. This shotgun wedding hasn’t worked well for any of the product lines. Rivera also drove Intel’s AI strategy.

Now, Rivera is the CEO of her own FPGA company and is out looking for some financial backing or perhaps a merger partner. Suitors include Apollo Global Management, Bain Capital, Francisco Partners, Lattice Semiconductor, and Silver Lake Management. These suitors have until the end of January to submit final bids.

The task of finding additional financial backing is a very tall order. Altera lived under Intel’s shadow from 2015 through 2024. That’s nine years of paying fealty and tribute to Intel’s processor mafia. The experience has blunted Altera’s competitiveness in the FPGA arena. Where once, Xilinx and Altera regularly swapped leadership places with each new FPGA generation, Altera lost more than a step or two when the company broke with its long-time foundry TSMC and hooked its wagon to Intel’s star. Hopefully, this recent step towards independence will allow Altera to once again shine on its own. We’re not there yet. Altera still lives partially within Intel’s penumbra. It’s Rivera’s job to bring Altera fully into the light. Here’s hoping she succeeds. The industry needs a strong Altera.

References

Kevin Morris, “Radio FPGA! Xilinx Announces RFSoCs,” EEJournal, February 21, 2017

Steve Leibson, “AMD ups the ante in the RF-enabled FPGA poker game with the Versal RF family,” EEJournal, January 13, 2025

Steven Leibson, “Intel Heats Up and Expands its Agilex FPGA family,” EEJournal, October 16, 2023

Steven Leibson, “AMD announces I/O-heavy Spartan UltraScale+ FPGA subfamily for low-cost designs,” March 13, 2024

Steven Leibson, “Altera unveils slightly more detail about the Agilex 3 FPGA family a year after announcing it,” November 4, 2024

Steven Leibson, “Lattice Semiconductor’s Nexus 2 platform brings significant performance benefits to low-end FPGAs,” January 22, 2025