I was just taking a trip down memory lane, remembering how things used to be when I was but a lad. Since the dawn of time, all the way through to the end of the 1960s, for example, electronic circuit diagrams (schematics) were captured by hand using pencil and paper. Similarly, circuit layouts at both the board and silicon chip level were largely handcrafted.
It wasn’t until the early 1970s that companies like Calma, ComputerVision, and Applicon started to create special computer programs that helped people in the drafting department transfer hand-drawn designs into digital form using large-scale digitizing tablets.
Over time, these early computer-aided drafting tools evolved into interactive programs that could be used to perform integrated circuit layout. That is, they could be used to describe the locations of the transistors forming the chip and the connections between them.
Other companies like Racal-Redac, SCI-Cards, and Telesis created equivalent layout programs for printed circuit boards (PCBs). Eventually, these chip and board layout programs became collectively known as computer-aided design (CAD) tools.
Also, throughout the late 1960s and early 1970s, universities and commercial companies started to develop computer programs known as simulators (first to simulate analog components and circuits, and later to simulate the digital domain). These programs allowed students and engineers to emulate the operation of an electronic circuit without having to build it first.
At the beginning of the 1980s, companies like Daisy, Mentor, and Valid spawned computer programs that allowed engineers to capture schematic diagrams on the computer screen. These tools could then be used to generate textual representations of the circuits called netlists that described the components to be used and the connections between them. In turn, these netlists could be used to drive the analog and digital simulators. Eventually, the same netlists were used to drive the layout tools.
Even though they were used for purposes of design, the companies promoting front-end tools for schematic capture and simulation classed them as computer-aided engineering (CAE) tools. This was primarily because the CAE companies wished to distinguish their products from the CAD tools that were originally used by the drafting department. They justified the use of the “E” in “CAE” by proclaiming that these tools were intended for design engineers.
Sometime during the 1980s, all the CAE and CAD tools used in the creation of electronic devices and systems came to be referred to by the “umbrella” name of electronic design automation (EDA), and everyone was happy (apart from the ones who weren’t, but they don’t count).
One of the company names that will “ring a bell” with many of my peers is that of SILVACO (which is derived from SILicon VAlley COmpany). Founded in 1984, Silvaco has a long and storied history. I’ve always thought of Silvaco as an EDA company with a focus on analog custom design and analysis. More recently, I’ve been made aware of the company as a provider of intellectual property (IP) in the form of embedded processors, wired interfaces, bus fabrics, peripheral controllers, and cores for automotive, consumer, and IoT/sensor applications.
I must admit, however, that it had completely slipped my mind that Silvaco’s original claim-to-fame was in the Technology CAD (TCAD) arena. “What’s TCAD? I hear you cry. Well, this is a branch of EDA that models semiconductor device operation and semiconductor fabrication. The modeling of the device operation is termed device TCAD, while the modeling of the fabrication process is referred to as process TCAD. All this includes the modelling of the process steps (such as diffusion and ion implantation), and the modelling of the behavior of the electrical devices based on fundamental physics, such as the doping profiles of the devices (phew!).
The reason I’m waffling on about all this here is that I was just chatting with Dr. Babak Taheri, who is the CEO at Silvaco. Babak surprised me from the get-go when he informed me how well things were going since Silvaco went public with an initial public offering (IPO) in April of this year. The reason for my surprise wasn’t how well things were going—rather that I had no idea they weren’t a public company already. I was also happy to hear that the folks at Silvaco have been enjoying double digit growth for the past five years, which means they must be doing something right.
Babak told me that, for the past 40+ years, companies like Cadence, Synopsys, Mentor (now Siemens EDA) and Silvaco have been primarily focused on helping designers to be more efficient and more capable of creating the next generation of products, remembering that this is a moving target in terms of new devices, new materials, higher levels of integration, smaller process nodes, and so forth.
Over the past few years, however, the guys and gals at Silvaco have been evolving their tools and technologies so that they are no longer only for designers—now these tools are heading to the fab in the form of digital twins of entire wafers and display panels. “Display panels?” I hear you cry. Yes. Did you know that Silvaco’s EDA tools are used by 7 out of the 10 of the world’s largest display panel companies, while its TCAD tools are used by 8 out of these 10 companies? (If you didn’t already know this tidbit of trivia and nugget of knowledge, you know it now!)
It’s rare for any story I tell these days to fail to involve artificial intelligence (AI) and machine learning (ML), so you won’t be surprised to hear that this story is no exception. The guys and gals at Silvaco have combined their expertise in semiconductor technologies with AI/ML and data analysis to develop an AI-based solution for wafer-level fabrication facilities called fab technology co-optimization (FTCO).
FTCO uses manufacturing data to perform statistical and physics-based AI/ML software simulations to create computer models or “digital twins” of wafers that can subsequently be used to simulate the fabrication process.
What we are talking about here is a digital twin of all the layers (transistors, metallization, etc.) forming a wafer. This digital twin is represented so accurately that fab operators can use it to run simulation experiments to understand and enhance wafer yield without the need to run physical wafers through the process, which can be both time-consuming and expensive.
As Babak says, “Our expertise spans from atomistic to system-level IP” (we can think of this as “from atoms to systems”).
From atoms to systems (Source: Silvaco)
One of the mind-bogglingly clever parts to all this is that creating a wafer involves thousands of process steps and millions of parameters, many of which are closely coupled and interrelated (i.e., you tweak one parameter “over here” and it affects a bunch of parameters “over there,” and vice versa). I simplistically think of this as an “n x n x n dimensional problem,” but that really doesn’t get close.
You could run billions upon billions upon billions of simulations to collect the data required to create a wafer-level model with a six-sigma level of accuracy. Unfortunately, this would take so long that, by the time you collected all this data, you would no longer have any use for it (because human civilization as we know it would no longer exist).
To address this conundrum, a crack team of double PhDs at Silvaco have come up with a way of using AI and ML to implement something called “intelligent sampling.” This is employed to pick the right set of samples required to fully represent the solution space that covers the fabrication of the wafer. Another way to visualize this is that 25 different algorithms (Brownian motion, simulated annealing, genetic algorithms, etc.) are employed, all under the direction of the AI/ML.
I’m afraid I laughed out loud when Babak concluded this portion of our conversation by saying, “It’s as simple as that.” Once I’d wiped the tears from my eyes, he qualified this by saying, “Well, the underlying concept is simple, but it’s taken us three and a half years to develop it and get it working” (I can well believe it).
Babak and I continued to chat about many related topics, but I fear my mind is already wobbling on its gimbals, so we will leave those discussions to another day. In the meantime, do you have any thoughts you’d care to share on anything you’ve read here?
PC based Futurenet schematic capture saved my little 2-person startup in 1984. We used the resulting netlist for a machine wiring technique on a prepared pcb. Otherwise, I would have been digging ditches for a living as my Daddy used to say…