GOWIN’s “Golly Gosh” Low-Cost High-Performance FPGAs
I remember when the first FPGA waved a cheery hello to the world back in 1985. (I know I’ve talked about this before, but there are always new members to the EE Journal Community who weren’t around when many of the technologies we now take for granted originally appeared on the scene.) This little scamp was the Xilinx XC2064, which boasted an 8×8=64 array of configurable logic block (CLB) “islands,” each containing two 3-input look-up tables (LUTs), all presented in a “sea” of programmable interconnect.
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