Most of us know Moore’s law to have only one independent variable – time. Mr. Moore predicts that, as time goes by, the complexity of our electronic designs increases exponentially. One thing Mr. Moore never mentioned in public, however, is the secret second factor. Aerospace engineers have long been aware that Moore’s law has a little- known term in the denominator. This factor is something like “one plus altitude squared.” As your design gets farther from the ground, the fabrication technology goes back in time along the line of progress. Until recently, by … Read More → "Space Silicon"

The TCP/IP protocol suite is the de facto worldwide standard for communications over the Internet and almost all intranets. Interconnecting embedded devices is becoming standard practice even in device classes that were previously stand-alone entities. By its very definition, an embedded architecture has constrained resources, which is often at odds with rising application requirements.

Achieving wire-speed TCP/IP performance continues to be a significant engineering challenge, even for high-powered Intel™ Pentium™-class PCs. In this article, we’ll discuss the per-byte and per-packet overheads limiting TCP/IP performance and present the … Read More → "Considerations for High-Bandwidth TCP/IP PowerPC Applications"

When I was a kid, my Dad had a big’ol vacuum-tube audio amplifier. It was massive, heated the room, and took several minutes to “warm up” before it was ready for duty. Sometimes the transformers would hum along with the music, which was OK if the tune was in a key that was a multiple of 60Hz. To me, the thing seemed a bit clunky compared with the transistor-based mainstays of the day. When I asked Dad about the amp, he’d always reply “Well, son, they used to make them all that … Read More → "Crossing Over"

Myopia is one of the few unfortunate consequences of specialization. While focus, refinement, and evolution deliver us some of our most impressive efficiencies, indiscriminate rule breaking is more often the root of spectacular progress. We walk along in our well-walled worlds day-to-day, carefully categorizing concepts like “Field Programmable Gate Array,” “Structured and Platform ASIC,” and “Programmable System on Chip,” and we forget to color outside the lines occasionally, just to see what happens.

Actel announced its new Fusion architecture this week, and somebody clearly went a little crazy with the coloring … Read More → "Actel Adds Analog"

Back when FPGAs were simpler devices, in-system debug was sufficient. Turning a re-spin in response to a specification violation found on the bench was a quick and easy process. Life was great, since re-spins were essentially “free”. This is no longer the case today. One company recently spent three entire months trying to incorporate just one late-coming specification change, because the design team encountered difficulties meeting requirements after making that single change. This is not an isolated case; increasingly painful re-spins are no longer a rare occurrence. Clearly, this particular re-spin cost the customer dearly. … Read More → "A New Spin on FPGA Re-spins"

“It was the best of times, it was the worst of times,
it was the age of hardware design, it was the age of programming,
it was the epoch of synthesis, it was the epoch of compilation,
it was the season of optimization, it was the season of acceleration,
it was the spring of flexibility, it was the winter of automation,
we had everything before us, we had nothing before us,
we were all going direct to Hardware, we were all going direct
the other way–in short, the period … Read More → "SRC Code"

What has over two million real ASIC gates, runs at over 200MHz with twenty levels of logic, burns about the power of a cell-based ASIC, and is economically feasible to deploy even in mid-to-small volume production? The answer is “Not an FPGA”. While these specs may sound close to the marketing picture painted by programmable logic vendors, there is a vast gulf between the brochure and real-world performance in an average application. Structured and platform ASICs, however, can realistically reach these goals in your average application, and getting design teams to understand that fact is one of … Read More → "LSI Logic’s Leverage"

From before my kids were born until after they were grown and graduated, it was a June ritual. Twenty-one times in all, I made my annual pilgrimage to the Design Automation Conference (DAC), perhaps the most misunderstood massing of technology professionals our industry has to offer. DAC is “Burning Man” for the left brain – a mysteriously gravitational gathering that inexplicably pulls people from around the globe to one central location in non-consensual celebration of the unclear.

This year, the 42nd annual DAC was held in Anaheim California. It featured 240 exhibitors, 60 of whom were showing … Read More → "Ditchin’ DAC"

The tool category known as “Kitchen Appliances” covers a wide gamut of capabilities. Kitchen appliances range from general-purpose, universally useful tools such as heat sources, to highly specialized, perhaps less-than-indispensable technologies like “in-the-egg scramblers”. If someone tells you that his or her tool is a kitchen appliance, you haven’t really gained any useful information about its utility for your particular application.

The design tool category known as “ESL” has similar characteristics. When someone tries to sell you an ESL tool, it’s never quite clear what you’ … Read More → "What the Hell is ESL?"

It was in the late 1990s that FPGA vendors first started exploring the low-cost, high-volume consumer market – a market that generally was ceded to standard, fixed-function devices. Exploring this market was made possible by the development of FPGAs with the right balance of features and the migration to advanced process nodes which helped to drastically reduce FPGA unit costs.

Historically for high-volume, price-sensitive applications, FPGAs were not the lowest-cost solution. However, as custom logic and FPGAs started to get pad-limited vs. core-limited, this started to change. Pad limitation occurs when the size … Read More → "FPGAs Enabling Consumer Electronics – A Growing Trend"