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Altera’s Quartus II 6.0

The FPGA market is a multi-faceted battlefield. Particularly between the largest two suppliers, everything is a race. There is a race to reach a new process node first, a race for the largest device, a race for the highest frequency, and a race for the lowest-cost parts. Silicon-based bragging rights aren’t enough to keep the conflict interesting, however. Both Altera and Xilinx, the two market-dominant FPGA suppliers, invest huge amounts of resources in the development of tools and IP to complement their device offerings.

While not as visible as the war of the … Read More → "Altera’s Quartus II 6.0"

Capitalizing on Connectivity

With device connectivity becoming the rule rather than the exception (practically any electronic device more complex than a flashlight today has some connectivity path to just about every other device on the planet), it makes sense that, like with our desktop computing systems, embedded systems must change to take advantage of that connectivity in both their development and deployment in order to remain competitive. For many engineering teams, the logistics of developing a system that can avail itself of the benefits of a connected-device world are overwhelming, and competitive advantages are left on the table with a nod toward … Read More → "Capitalizing on Connectivity"

On the Cutting-Edge of FPGA Design and Verification

As advanced FPGAs have grown to ASIC proportions in terms of size and complexity, their design and verification have become correspondingly more difficult. This has driven the need for greater expertise in the design and verification of FPGAs. However, many companies, large and small, lack either the resources or the expertise for these demanding designs, so they turn to engineering service firms like A2e Technologies.

Typically projects reach us at a point in the design schedule where schedules are tight and time is of the essence. We need to get up … Read More → "On the Cutting-Edge of FPGA Design and Verification"

Virtex-5 is Alive

Innovation is a hot topic these days. We ourselves have billed innovation as “the fuel that powers technological progress” in our industry. You’d think, with the industry’s first 65nm FPGA family rolling into production, we’d be saluting another salvo of innovation and inspiration from the world’s largest FPGA company. We are, of course, but even more than that, we’re chronicling the execution of an equally important factor in high-tech success – learning. In their introduction of V5, Xilinx has shown us all that they’re a company that learns – learns from their successes, … Read More → "Virtex-5 is Alive"

Microsoft Rolls Out CE 6

Well, it’s been ten years and five versions since then, and baby Windows has busted out of the car seat, learned to walk and talk, and is now kickin’ some serious butt in school. At the MEDC (Microsoft Embedded Developer’s Conference) last week, Microsoft announced the beta version 6 of CE. Over the course of the decade, the demands on embedded RTOS for mobile devices has exploded with wireless connectivity, more complex applications, data-intensive functions such as image, audio, and video, and more client-server type services.

The new version of CE is clearly working to keep … Read More → "Microsoft Rolls Out CE 6"

Altera Readies for 65nm

We humans like to worry. Instead of being content with just living our happy lives, walking around enjoying the sunshine, eating our food, talking to each other on our mobile phones, and designing our next-generation electronic products, we mull and fuss about whatever nemesis might come along and end our little party. Will global warming overheat our junctions? Will earthquakes and volcanoes shake us into spilling our cocktails? Will comets and meteors crash into our spinning ball of fun, bringing on another ice age? With every additional year we speculate about new spoilers that might spell the end of … Read More → "Altera Readies for 65nm"

Eclipsing all Others

Then trouble came. Over in the desktop and enterprise development worlds, it seemed, a revolution was afoot. The dominance of the desktop development environment of Microsoft had sewn the seeds of a socialist revolution. A not-so-secret society had spawned a groundswell of collaborative development among several companies and independent software developers who wanted to create an alternative for themselves – to take control of their own development destinies. Following in the footsteps of the Linux phenomenon, Eclipse was born.

Conceived in late 2001, Eclipse arrived as the alternative to the ubiquitous Microsoft Visual Studio series. It is an … Read More → "Eclipsing all Others"

Innovation Big and Small – Chapter 2

The larger company, however, faces a situation where they can fall victim to the spoils of their own success. Once upon a time, they too were focused, fast-reacting, hard-driving startups. At some point, however, they probably made a major score with a successful product line that propelled them into the big leagues. With that membership card comes a bloat of baggage – support for existing product lines, protection of previously captured market territory, more employees to water and feed, reputations to protect, policies to follow, and legal hurdles to clear. The innovation balance can tip wildly away from their … Read More → "Innovation Big and Small – Chapter 2"

Innovation Big and Small

It’s four o’clock in the morning. Roger gets up from his laptop to walk to the dorm-size refrigerator in the corner of the makeshift office. He pulls out a Mountain Dew, downs a sizable swig, and then places the can at the end of a row of six empties that have accumulated beside his keyboard during the evening. Adjacent to his desk sits a pyramid of empty Mountain Dew cans – an art project in progress, a monument to a month of Roger’s late-night work-a-thons, all aimed at getting the product ready for tomorrow’ … Read More → "Innovation Big and Small"

Blaming the Button

We FPGA designers work hard to get our RTL ready to rumble. We round up our IP, mull over the microarchitecture, sweat over the simulation, and finally get things lined up well enough to push the big GO buttons for synthesis and place-and-route. After that, the design is mostly out of our hands, right? The tools do their job, and, unless we have some critical paths that need optimizing, some LUTs hanging around loose after placement, or some routes that ended up unrouted, we just sit back and wait for the system to tell us that everything … Read More → "Blaming the Button"

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