I pushed the button to turn off the night vision scope, but the eerie greenish image of the Utah desert landscape persisted. The characteristic cloud of sparkling noise continued to dance in my viewfinder making it look like the desert had been invaded by an army of crazed fireflies. Otherwise, the scene was devoid of any movement from the nocturnal desert life I had been seeking.

Somewhere, possibly thousands of miles away and maybe dead by now, there is an engineer for whom the design of this particular scope was a major project – someone who fought with … Read More → "Forgotten Battles"

The fortress of an established FPGA company has many walls. One side is defended by the incredible cost of creating a competitive programmable logic architecture in a cutting-edge process geometry. With the leverage of a process node or two between you and your competitors, you can successfully fend off an attack by a less-established company simply by being in production with a line of parts on the current smallest geometry available. However, the basic architectures of programmable logic are now fairly well known and not well defended by current patents, so anybody with good business sense, a … Read More → "Critical Commoditization"

Despite some popular speculation, “DAC” does not stand for “Declining ASIC Commiseration.” The Design Automation Conference is a robust and lively gathering of companies, customers and comrades sharing a common interest in the progressive automation of the electronic design process. As we’ve discussed the past couple of weeks, however, the historical focus of DAC has been on the custom and semi-custom digital IC design process. Sure, there have always been other disciplines and interests represented, but the money, the momentum, and the fear have always been centered around the completion of complex IC designs and the … Read More → "FPGAs at DAC"

The 43rd annual Design Automation Conference (DAC) got underway yesterday in San Francisco, California. The technical sessions have begun, the exhibits are open, and the parties, PowerPoints and pejoratives have now commenced. Last night, at a media, analyst, and customer briefing dinner at the San Francisco Museum of Modern Art, Walden Rhines, Chairman and CEO, hosted a customer presentation explaining how Mentor’s new Caliber nmDRC accelerates nanometer design rule checking by “hyperscaling” – a technique that takes efficient advantage of multiple processing elements to deliver many times the previous performance in giant DRC runs.

… Read More → "Electronic Elitism"

Exactly 299 days before “Cramming More Components onto Integrated Circuits” was published in Electronics Magazine, the first workshop of the SHARE Design Automation Project was held in Atlantic City, New Jersey. The SHARE workshop had papers with titles like “A method for the best geometric placement of units on a plane” and “Design automation effects on the organization.” The magazine article began with the statement “The future of integrated electronics is the future of electronics itself.”

With such generic paper titles and such an auspicious article intro, what has transpired since then that has inexorably linked those two … Read More → "DAC Previsited"