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Electronic Elitism

Beyond promoting the polygon-pushing power of parallel processing, Mentor’s presentation also highlighted an interesting reality of today’s Electronic Design Automation (EDA) industry – nanometer class design tools are getting bigger, faster, more sophisticated, more expensive, and consequently, more exclusive. Among the customers heaping praises on Caliber nmDRC for its parallelizing prowess were AMD and Intel – hardly the novice class in semiconductor design.

It is no secret that the number of ASIC and COT (customer-owned tooling) design starts has declined steadily over the past several years and is forecast to continue declining for the foreseeable … Read More → "Electronic Elitism"

DAC Previsited

Exactly 299 days before “Cramming More Components onto Integrated Circuits” was published in Electronics Magazine, the first workshop of the SHARE Design Automation Project was held in Atlantic City, New Jersey. The SHARE workshop had papers with titles like “A method for the best geometric placement of units on a plane” and “Design automation effects on the organization.” The magazine article began with the statement “The future of integrated electronics is the future of electronics itself.”

With such generic paper titles and such an auspicious article intro, what has transpired since then that has inexorably linked those two … Read More → "DAC Previsited"

DAC Previsited

With such generic paper titles and such an auspicious article intro, what has transpired since then that has inexorably linked those two seemingly obscure technical publication events? Pretty much everything.

15,071 days later (this coming Monday, in fact,) the 43rd annual Design Automation Conference (DAC) will kick-off in San Francisco, California.

The SHARE design automation workshop, held in Atlantic City in June 1964, is now counted as DAC #1. The Electronics Magazine article, published less than a year after that seminal if inauspicious design automation event, contained a small section that threw down the gauntlet to the fledgling … Read More → "DAC Previsited"

System-Level Sideshow

He pauses for exactly the right amount of time, then whips into his delivery with energy and zeal – “Have youuuuu been struggling to meet ever-tightening design schedules with more complex designs and a smaller, leaner design team?” He picks up the pace, enunciating each word with perfect clarity. “Do youuuuu find that the RTL methodology is too cummmmmbersome for today’s more sophisticated FPGA designs?” He widens his eyes as he meets the gazes of each member of the audience, conveying an ominous fear. “Are youuuuuuu suffering the pain and ravages of MOORE’s LAW?!?”

The … Read More → "System-Level Sideshow"

Going for Speed

It may be surprising that such careful engineering attention is required to gain the desired performance from this lowest echelon of racing – cars powered only by gravity and driven by kids aged 9 to 16. It might also be counter-intuitive that some of the most careful engineering for processor performance comes in the very lowest echelon of computing systems – devices where many tiny processors may be put on a single chip in a system that might sell for single-digit dollars at the retail level. Both, however, are driven by the same constraints. When power, size, and cost are all at … Read More → "Going for Speed"

Tooling up for 65nm

Every time FPGAs hit a new process generation, there is a buzz. People want to hear about the underlying architecture, learn how fast the new devices will go, guess at how much logic they’ll hold, speculate on whether we’ll need a small nuclear power plant to operate them, and marvel at marketing’s ability to take something already quite impressive and exaggerate it to the point where we have no idea what it can actually do. We tingle with excitement. We wait a year until actual devices are available. Then, when the magic moment comes and we … Read More → "Tooling up for 65nm"

Logic Lockdown

Engineers are trained problem solvers. While various fields of engineering require different types of technical training and expertise, the techniques of problem solving are universal to all branches of the profession. If engineers are problem solvers, could one infer that reverse engineers are problem creators? In a narrow view, probably so – but reverse engineering has its place in the innovation cycle as well. Reverse engineers also help us hone our security skills to prevent attacks from those who wish to do us (and our design IP) harm.

Reverse engineering is not a back-alley, cloak and dagger, … Read More → "Logic Lockdown"

Logic Lockdown

Reverse engineering is not a back-alley, cloak and dagger, business-in-the-shadows affair – quite the contrary, in fact. Companies specializing in reverse engineering operate openly and have a long and public history, particularly in the semiconductor arena. In the United States, reverse engineering has the protection of law, with the Supreme Court ruling that “A trade secret law, however, does not offer protection against discovery by fair and honest means, such as by independent invention, accidental disclosure, or by so-called reverse engineering, that is by starting with the known product and working backward to divine the process which aided in … Read More → "Logic Lockdown"

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