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It’s All About Us

Three years and over one-hundred-fifty editions ago, the first copy of FPGA Journal rolled off the virtual presses, coursing its way through the digital jungle to about a thousand unsuspecting initial subscribers. Our first feature article, “Making the Transition – FPGA Primer for ASIC Designers,” was well received, as were most of the ninety-one features and hundreds of news stories we ran that first year in 2003 and 2004. If you’ve never browsed our [Read More → "It’s All About Us"

Soft Core War

Before FPGAs became viable system-on-chip platforms, there were two simple basic food groups in the embedded processor world: stand-alone processors for board- and module-level integration and processor IP cores for system-on-chip integration. Some of the most successful offerings today are processor architectures that managed to span both of those domains, such as ARM’s wildly successful architectures that have attained widespread adoption both as flexible IP cores in ASIC SoC implementations and in high-value, stand-alone chipsets for board-level integration.

Recently (as we’ve thoroughly documented in these pages), FPGAs have shrunk and grown to the … Read More → "Soft Core War"

Connecting the Camps

The MathWorks is bucking that trend, however, because they’ve approached the problem from a different direction. First, they won the hearts and minds of the electronic design community with their general purpose (non-EDA-specific) tools like MATLAB and Simulink. Then, when they apparently noticed that they had thousands of seats of software in places where only EDA companies typically played, they set about developing domain-specific technology to try and capitalize on that market presence.

This week, The MathWorks made another bold step across that line from supplier of general-purpose software tools to head-on competitor for some of … Read More → "Connecting the Camps"

Connecting the Camps

It happens from time to time. Some well-meaning high-tech company notices that they’ve got some pretty cool design tool technology and says to themselves, “Hey, we’ve got some cool design tool technology. Let’s jump into the EDA market!” These are fateful thoughts, however – best pushed aside. In practical terms, they are akin to “Hey, I’ve got myself a pretty cool racing bike – I think I’ll compete in the Tour de France!” Sometimes, though, a company that, perhaps, developed some nice tools for their own internal use, feels just too tempted and takes that … Read More → "Connecting the Camps"

Lattice Breaks the Rules

FPGAs fall into two distinct camps – high-performance and low-cost. For several years, the rules and conventions of these strata have been established and followed by FPGA companies. Low-cost or value-based FPGAs are designed with cost as the first priority. Every spare feature is thrown overboard in order to minimize die size and production cost, leading to the lowest possible price-per-LUT for a given amount of programmable fabric. High-end FPGAs, on the other hand, spare no expense in offering the maximum performance and the richest feature sets.

The silicon selection rules for FPGA designers have been, therefore, … Read More → "Lattice Breaks the Rules"

Accelerating RTL Analysis & Creation with Spreadsheets

History of the Spreadsheet

In 1979, a young Harvard Business School graduate student envisioned a new methodology to effectively organize and process large amounts of data through variations of parameters to yield an exact what-if analysis of numerical models, utilizing something called a personal computer. The young graduate student, Dan Bricklin, created VisiCalc™, the first killer app for the nascent personal computer industry of the early 1980’s. Today millions of users depend on the progeny of VisiCalc, the most popular being Microsoft Excel™. Financial, scientific, … Read More → "Accelerating RTL Analysis & Creation with Spreadsheets"

IP to Go

The race is on. Both competitors push pedals deliberately as the brakeless bikes start moving on the highly banked oval of the velodrome. Suddenly, before they have completed a second lap, the leader pulls his bike up the slope and comes almost to a stop, trying to lure his competitor into passing him on the inside. The duel that ensues is ironically typical of two-competitor sports like sprint cycling. Each cyclist strategically maneuvers his bike to try to gain the advantageous position – just behind the other in the aerodynamic wake. Sometimes, one of the cyclists will “track … Read More → "IP to Go"

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