I/O-topia
Last week we examined the legacy of the LUT – the basic building block that defines the very fabric of FPGAs. Surprisingly, however, the primary driver of attributes such as cost, power consumption, and utility in FPGAs is not the fabric itself, but the choice of I/O for the device. You see, while the internal logic keeps shrinking, some of the I/O structures don’t really scale well – things like bonding pads and higher-current transistors don’t track Moore’s Law, so the cost of an individual I/O compared with … Read More → "I/O-topia"