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Accelerating Persistent Surveillance Radar with the Cell Broadband Engine

Multicore processing chips answer the power-energy challenge while increasing processing capability. For many years, increasing the computational power of processing chips has been achieved by increasing the core-clock frequency. However, this boosts the required input power and cooling by the cube of the frequency. A partial answer is achieved by using superscalar, single-instruction multiple-data (SIMD) architectures and larger memory caches. Multicore technology takes this trend a step further through the use of multiple full-function cores, each with its own local memory, on a single chip. Surprisingly, the movement toward multicore technology has not been driven by military applications, but … Read More → "Accelerating Persistent Surveillance Radar with the Cell Broadband Engine"

Multicore to Massively Parallel

“There is a lot of hype about multicore, but there is no infrastructure to support it.” A throw-away remark from a senior figure in an embedded tools company was the start of this article. Certainly he didn’t want to be quoted directly, which made me greatly to wonder. As I started researching the issues I talked to a number of people across the industry. The choice wasn’t scientific or comprehensive – just people I thought might have opinions that were valuable, whose company had recently made an announcement in this area, written an article … Read More → "Multicore to Massively Parallel"

The Very Model Of Reusability

Silos can be wonderful things when used properly. They keep your grain dry when it rains. They provide a handy storage. They can look lovely, providing the only real topography in an otherwise 2-D landscape. And they evoke the heart of America (well, to Americans anyway… no intent to disenfranchise the rest of the world).

Unfortunately, silos aren’t restricted to the picturesque plains of the Midwest. They exist amongst us, around us. Many of us work in silos. We are indeed kept out of the rain, and sometimes it feels … Read More → "The Very Model Of Reusability"

Reconfigurable Computing for Acceleration in HPC

There has been significant research to support the potential performance gains available through the use of reconfigurable hardware for certain classes of computationally-intensive tasks. However, despite well-known advantages, the technology has historically struggled to gain a strong foothold in the high-performance computing (HPC) marketplace. While there were many reasons for this lack of early widespread acceptance, one major issue has been a lack of standards surrounding reconfigurable processors and the absence of a standardized system architecture that can effectively employ them.

Many of the technological barriers to widespread use of reconfigurable computers have been overcome, and with … Read More → "Reconfigurable Computing for Acceleration in HPC"

Making FPGAs Cool Again – Part 1

It was a demonstration that buzzed around the (admittedly small incestuous) industry. A digital clock being powered by a grapefruit. It’s the kind of thing you might see on the Discovery Channel these days, but back in the day, Phillips/Signetics created a local stir with their comparatively ultra-low-power CPLDs. At that time, it was competing with the incumbent PALs that drew about 180 mA of current (and competing with their half- and quarter-power versions made possible by CMOS encroaching on an erstwhile bipolar domain). As the smaller devices became commoditized, the spotlight moved to FPGAs, … Read More → "Making FPGAs Cool Again – Part 1"

HDMI To Go

My setup bears the tell-tale tattoos of early-adopter syndrome.  Each signal source plumbed into the cable jungle on the back of the receiver has no fewer than five separate strands – three for component video and two for analog audio.  An S/PDIF might add to the bundle with optional digital audio.  One input source – the homebrew HTPC has a pasta-like plethora of cables coming out of the sound and video cards – some of which run through a special converter box that switches VGA to Component Video.  Fifty expensive component cable-feet away is … Read More → "HDMI To Go"

Attacking Abuses of Power – Part 1

It’s the era of energy. Look at the newspaper and see how many stories ultimately relate to energy. Oil and gas prices are up. Natural gas is no longer a cheap alternative to electricity. Energy companies teach the world that some of them can’t be trusted to operate in a “free” market. Nuclear is given another look. Coal is marketed as “clean.” Food prices go up in parts of the world as food competes with ethanol for grain. Many oil and gas companies have also adopted the practice of using a Read More → "Attacking Abuses of Power – Part 1"

SystemVerilog is Coming to FPGA Design

Introduction

Since its introduction in 2005, SystemVerilog has been touted as the way to marry design and verification into a single language, enabling design with verification. Despite its blending of the best of Verilog, assertion languages and VHDL, SystemVerilog adoption has been slow — as with any new HDL or design methodology. But the language’s popularity is growing as tool support has improved, starting first with verification teams then expanding to ASIC designers and now also FPGA designers.

Why SystemVerilog in the First Place?

In times … Read More → "SystemVerilog is Coming to FPGA Design"

Zero Power for Zero Dollars

OK, we have to come clean right away.  In introducing their new 99 cent FPGAs (yep, not a typo), Actel never claimed that they were zero dollars or zero power.  FPGA Journal is adding that part via a superpower we call “editorial license.”  Here’s how it works – some of Actel’s competitors have already called their competing parts “Zero Power” because they have a static power consumption of less than a milliwatt. Apparently, the old ammeters would just show zero when the current dropped into the microamps, and some … Read More → "Zero Power for Zero Dollars"

Avoiding the Failure to Communicate

Bill left via the front yard, striding purposefully down the street, while the other two scurried out the back door to the alley. John went left, Nathan went right; he was holding what little jewelry they had managed to grab. Bill had no idea whether the others had gotten anything; he hoped that they would have something to show for their efforts, despite being interrupted early. He rounded the corner just as two squad cars screamed past. One stopped in front of the house, the other headed into the alley – right towards John. Nathan had almost … Read More → "Avoiding the Failure to Communicate"

featured blogs
May 2, 2025
I can safely say that I've never seen a wheeled-legged robot that can handle rugged terrains, muddy wetlands, and debris-strewn ruins like this...