Pushing programmable logic into portables is a power play.  Portable devices put power consumption at a premium, and silicon vendors looking for a socket have to answer for each and every coulomb consumed by their chips.  Of course, they’re also interested in absolute minimal cost and board real estate, so getting a programmable device into your portable is unlikely at best.

Now, Altera’s somewhat uncategorizable Max II family is adding a super-stingy “zero power” (meaning “not very much power”) Max IIZ version to the lineup.  Altera … Read More → "Zeroing in on Power"

Using VHDL or Verilog to design FPGAs is just plain wrong.

Talk with any expert in languages, in logic synthesis, in hardware architecture.  If you get past the “but that’s how we do it” layer of defenses, you’ll pretty quickly uncover a vast ocean of oddity that will make you wonder just why anyone ever considered the idea of doing FPGA design with HDLs, let alone how HDL-based design became the de-facto standard.

First, taking VHDL as an example: most of the things you can write in VHDL … Read More → "Legacy of Languages"

He holds the joystick with a light, experienced grip – his eyes fixed on the screen.  His hands are steady as his viewpoint skims through a rotating object resembling a cityscape with strange buildings and vast networks of roads interconnecting them.  He then dives below the surface, moving through the layers of the virtual world, flying past cylinders that look like giant elevator shafts bridging the levels.  He slows as he comes to the area he’s interested in. 

There, he spots a problem.  A buried via is dangerously near a … Read More → "Altium Goes 3D"

Introduction:

Most FPGA designs today rely on an HDL based description of their design. HDL synthesis is probably the single most important software flow step when it comes to defining the performance of a design.  Synthesis links the conceptual description of the logic functions needed for the design to their actual physical architecture elements in the underlying device.  This step cannot be underestimated.  Synthesis is performed prior to chip placement as an entirely separate step, hence these technology dependent optimizations are computed without knowledge of actual chip … Read More → "Physical Synthesis Flows for FPGA Designs"

Now that it is officially OK to use FPGAs in battery-powered devices, we’re seeing two groups of designers converging on the low-power FPGA design topic.  First, there are those who have been working on low-power and portable applications for years and are just now taking on FPGAs for the first time.  Second, there are those who have been doing FPGAs for years, but have never needed to perform power-conscious design because their FPGA designs were always run from small dedicated nuclear power facilities.  While both of these groups are learning new techniques, the thing … Read More → "Designing Down Power"