Articles – Page 540

SystemVerilog is Coming to FPGA Design

February 19, 2008

Introduction

Since its introduction in 2005, SystemVerilog has been touted as the way to marry design and verification into a single language, enabling design with verification. Despite its blending of the best of Verilog, assertion languages and VHDL, SystemVerilog adoption has been slow — as with any new HDL or design methodology. But the language’s popularity is growing as tool support has improved, starting first with verification teams then expanding to ASIC designers and now also FPGA designers.

Why SystemVerilog in the First Place?

Zero Power for Zero Dollars

Actel Breaks the Buck Barrier

by Kevin Morris

February 19, 2008

OK, we have to come clean right away. In introducing their new 99 cent FPGAs (yep, not a typo), Actel never claimed that they were zero dollars or zero power. FPGA Journal is adding that part via a superpower we call “editorial license.” Here’s how it works – some of Actel’s competitors have already called their competing parts “Zero Power” because they have a static power consumption of less than a milliwatt. Apparently, the old ammeters would just show zero when the current dropped into the microamps, and some … Read More → "Zero Power for Zero Dollars"

Avoiding the Failure to Communicate

by Bryon Moyer

February 19, 2008

Bill left via the front yard, striding purposefully down the street, while the other two scurried out the back door to the alley. John went left, Nathan went right; he was holding what little jewelry they had managed to grab. Bill had no idea whether the others had gotten anything; he hoped that they would have something to show for their efforts, despite being interrupted early. He rounded the corner just as two squad cars screamed past. One stopped in front of the house, the other headed into the alley – right towards John. Nathan had almost … Read More → "Avoiding the Failure to Communicate"

Effectively Using Internal Logic Analyzers for Debugging FPGAs

by Kevin Morris

February 12, 2008

Factors Driving Change in FPGA Debugging Techniques

The ability to reprogram an FPGA has been a key benefit during the functional debug of a hardware design. If the design is not working correctly, the ability to add “debug hooks” has been used by engineers since the earliest use of CPLDs and FPGAs. Initially, signals internal to the FPGA that needed to be observed were brought out to pins and then external logic analyzers were used … Read More → "Effectively Using Internal Logic Analyzers for Debugging FPGAs"

45nm Chicken

We Win

by Kevin Morris

February 12, 2008

The swamp screams loudly around the abandoned road as the jousters position themselves for their impending bout. Somewhere, in the back of their alcohol-soaked brains, they visualize themselves as medieval warriors mounting their steeds in a duel of chivalrous wit. In the real world, their decrepit death-trap pickup trucks are a far cry from the mounts they mentally mimic, and the assembled audience of mosquitoes, flies, and the occasional bullfrog hardly constitutes the cheering throngs envisioned by these imbecilic soldiers of the sullen South.

With a final swig from their respective flasks of courage and … Read More → "45nm Chicken"

Utilizing Power Management Techniques in Embedded Multicore Devices

by Kevin Morris

February 12, 2008

There are many accepted reasons that support a move to multicore design in portable devices: scalability, specialty cores, increased performance, and reduced power consumption are just a few. This article, however, takes the approach that there is only one true reason why multicore makes an attractive platform for portable devices.

Before we explore that one reason, let’s debunk a couple of the more common reasons about multicore. For example, scalability is often cited a key reason to move to multicore because if one core is not fast enough then one can add another. … Read More → "Utilizing Power Management Techniques in Embedded Multicore Devices"

ARM Mobilizes Graphics

Mali 2D Standards Buffet

by Kevin Morris

February 12, 2008

First, JSR184 was out there all by itself, carrying the Mali mantra to the masses – bringing smart feature phones fancy graphics capabilities formerly found only on immobile devices like computers and gaming consoles. Now, ARM has fleshed out the Mali software/middleware family with JSR226, JSR287, and SVG-t. What does this alphabet soup of standards designations mean?

For starters, let’s remember that ARM is an IP company. Their business is based on licensing processor IP (and all of the goodies that surround processor IP) primarily to mobile handset developers. As … Read More → "ARM Mobilizes Graphics"

DesignCon Steps it Up

Eye Candy for the Digital Designer

by Kevin Morris

February 5, 2008

DesignCon is one of the few industry events that manage to be simultaneously broad and focused. The conference overview proudly proclaims, “DesignCon attracts engineering professionals from various levels and disciplines and represents many aspects of electronic design.” For a small-ish event, this would seem like a recipe for disaster. With topic categories ranging from signal integrity in multi-gigabit serial interconnect to power-aware design, test fixturing, and “business and engineering impacts,” you’d expect a program that leaps around from topic to topic like a kid with ADD manning the cable remote.</ … Read More → "DesignCon Steps it Up"

Moving Data with VME

by Kevin Morris

February 5, 2008

So VME has pretty much had to toil in what might feel like obscurity as compared with the attention that the PCI derivatives and ATCA have garnered. And you might – just maybe – be forgiven for thinking that VME is an old standard that’s pretty much restricted to legacy applications. But you’d be wrong. Yes, VME’s application market has narrowed. But there is still demand, and that demand is sustained based on developments to the VMEbus standard that sprang from the VME Renaissance of 2002.

The original basic VMEbus standard has & … Read More → "Moving Data with VME"

State of the Union – Addressed

Major Players Weigh in on FPGA

by Kevin Morris

February 5, 2008

Since I was moderating the panel, and we know how these things tend to go, we had a pre-meeting before the conference to get the preliminaries out of the way:
Moderator (me): OK, let’s get started with our FPGA panel discussion…
Exec #1: My chips are faster than yours.
Exec #2: No they aren’t, but they use way more power.
Exec #3: That’s just because you’re not using our design tools.
Exec #4: Nobody uses your design tools. Everyone uses ours because they’ … Read More → "State of the Union – Addressed"