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40nm Altera Stratix IV

New process nodes have a predictable rhythm.  Until about 90nm, we knew before anybody announced anything that we’d get double the density, half the power (dynamic, of course), and 50% more speed than we had in the previous generation.  Of course, that made waiting for the announcements from semiconductor companies a little less than suspenseful.  Our Moore’s Law alarm clock would beep on its two-year cycle.  We’d check to see if anybody had announced the thing we were expecting yet, and then we’d hit the one-month snooze button … Read More → "40nm Altera Stratix IV"

Special Recognition

“OK people, can I have your attention please? I need you all to listen up. All right. Quiet… Now… I want you all to get in a line along that wall there. We’re going to be doing some recognition stuff this morning, so get in line and we’ll get you trained up on what you need to look for. We may not need all of you, but I need you here just in case. And if we need more than you guys, we may have to add another group of … Read More → "Special Recognition"

Three Chords and the Truth

Twelve Bar Blues is structured improvisation.  A standard twelve-measure chord progression repeats tirelessly, and the experienced blues musician lays his soul over this monotonous harmonic structure like a fine linen drapery.  Aart de Geus, President, CEO, and Co-Founder of Synopsys, the world’s second largest electronic design automation (EDA) company, is also an accomplished blues guitarist.

Blues in C
I (C) Measures 1-4:

The tonic orients the ear, providing a firm foundation of reference.  In traditional blues, it is repeated for the first four bars of the sequence, setting up “home base” … Read More → "Three Chords and the Truth"

High-Speed Serial Comes to the Analog/Digital Divide

Everyone knows that if you want to do things slowly, you do them one at a time. If you want to get more done, you get more people to help do things in parallel. Right? I mean, in the world of electronics, think “serial,” and what might come to mind is the slow, stately procession of bits plodding from your desktop to some not-very-needy peripheral. You want speed? Check out the parallel port, where multiple lines are willing and able to deliver the kind of data demanded by your more high-maintenance attention-craving peripherals.

Read More → "High-Speed Serial Comes to the Analog/Digital Divide"

Multicore Messaging Manifested

A few weeks ago we took a look at the new MCAPI standard that provides low-level, low-overhead message-passing capabilities for multicore and tightly-coupled multi-processor systems. But of course, standards are no good unless someone implements them, so here we take a look at the first commercially-available implementation of the MCAPI standard, built by Polycore. As MCAPI committee chair, Polycore’s Sven Brehmer has been well-positioned and motivated to bring to market a realization of the standards work.

The standard itself is simply an API, and it specifies no implementation details. An MCAPI … Read More → "Multicore Messaging Manifested"

Avoiding Failure Analysis Paralysis

Back when I was a product engineer working on bipolar PALs (oops – I mean, PAL® devices), one of my main activities was figuring out what was wrong. That was most of the job of a product engineer: fix what’s broken. You don’t spend any time working on the stuff that’s working, you work on what isn’t working. Assuming it’s a chip that’s wrong, the process would typically start with a trip into the testing area to put a part on the tester and … Read More → "Avoiding Failure Analysis Paralysis"

Golden Hammer

The countdown counter/timer circuit was pretty trivial to code up in VHDL.  My dev board had an old FPGA on it, but it didn’t matter.  The original version of my little design probably used less than 10% of the chip anyway.  I’d enhanced it several times, of course.  The original one loaded a big number into the register and then counted down.  When the countdown reached zero, an audio-frequency square wave was generated at an output pin.  A little amplifier circuit took the digital signal and ran it straight … Read More → "Golden Hammer"

Coming to a Home Near You?

This is a story that starts with the improbable topic of building controls – you know, those complex systems that ensure that no matter where you are in the building, it’s too damn cold. Way back in the last century, these controls were dominated by large companies with complete proprietary systems. OK, they sorta still are, but work with me here. The users of the systems were more or less captive to their controls company, and changes to the system needed by the users resulted in a nice high-profit source of consulting income to the controls company.</ … Read More → "Coming to a Home Near You?"

Almost Instant Replay

It’s 4th and goal, 0:15 to go in the last quarter. The ball is snapped, the quarterback steps back, finds his receiver, and throws. Seeing the play develop, the defender runs to cover the receiver. They both jump in an aerial pas de deux; the ball dances elusively into the air, spins tantalizingly near outstretched fingertips, and falls harmlessly to the ground. While the defender gyrates around in a rather improbable new display of exultation that he hopes will sweep the nation, the receiver cries interference and looks to the referees for justice. The referees … Read More → "Almost Instant Replay"

How To Implement SystemVerilog for FPGA Design

Introduction

Since its ratification in 2005, the SystemVerilog IEEE-1800 standard has experienced broad adoption in the verification and assertion space but has lagged for design constructs. Engineers may be wary of revamping current design methodologies, or they assume that SystemVerilog for design is not relevant to their projects, or they fear that field-programmable gate array (FPGA) synthesis tools do not fully support the new standard. All three of these concerns are either exaggerated or based on misconceptions. SystemVerilog is fully supported by leading synthesis tools, and the new design constructs are in fact relevant … Read More → "How To Implement SystemVerilog for FPGA Design"

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