Should 2008 be forgot, and never brought to mind?  

Should global economic downturns be ignored, and days of auld lang syne?

A few years ago, in the United States, tax laws were passed that made it attractive to “flip” houses by buying them, fixing them up, and quickly selling them for a big profit – mostly tax-free profit.  Many Americans made substantial amounts of money by moving every year or two to a different residence and reaping the rewards.  Of course, all this rapid turnover and appreciation in the housing market pushed home prices … Read More → "Auld Langxiety II"

How do penguins tell each other apart? For that matter, how to barnacles, or pigeons, or orangutans recognize each other (we know how dogs do it)? To our eyes, they all look pretty much the same.

The same could be said of FPGAs. Mass production is one of the hallmarks of the semiconductor industry, as identical chips stream off the production lines. Intel’s enormously successful manufacturing prowess revolves around the mantra, “copy exact.” Every Intel fab is just like every other Intel fab, and every chip is identical to every other chip. That& … Read More → "Verayo Leaves Tiny Fingerprints on Chips"

Building on commodity hardware and industry standard software programming methods, Baylor group architects a $10,000 reconfigurable computing cluster.

Accelerated computing – using programmable logic and other non-traditional processing resources to augment clusters – has become increasingly popular. Most recently, the NSF announced that $20,000,000 in funding is available for research groups to push beyond petascale computing. Accelerated computing represents the leading edge of the high performance computing wave, as evidenced by the world’s fastest supercomputer, the Roadrunner cluster located at Los Alamos National Labs. Roadrunner makes use of commodity processors coupled with … Read More → "Low Cost Reconfigurable Computing Cluster Brings Millions of Reconfigurable FPGA Gates to Students"

According to Gartner’s Jim Tulley, there are around 7,000 ASIC design starts a year, a number that is in slow decline. By way of contrast, there are around 100,000 FPGA design starts a year, of which 30,000 include a microprocessor of some kind.  Yet for eleven years at the IP conference in Grenoble, the leading get-together for IP suppliers and users, the only mention of FPGAs has been in the context of building blocks for ASIC prototyping tools or, more recently, for testing the market before undertaking the incredibly more costly task of building an ASIC.

Obviously, … Read More → "IP for Complex FPGAs"