It has long been a dream of big-picture systems engineering visionaries to crack the barrier between hardware and software. Traditionally, the amount of effort required to take software features and accelerate them by turning them into dedicated hardware has been high and not easily done at the last minute when, for example, a coding bottleneck that needs hardware acceleration is uncovered right before release time.

This is, of course, the impetus behind the many flavors of C-to-RTL that have arisen over the years. From the early days of Handel C to the present, much effort has been … Read More → "Going Against the Grain"

Conventional wisdom would suggest that the quickest way to get between two places is via the fastest available road. And, with some exceptions, that would generally be a freeway (or “highway” for those of you with a more extensive toll infrastructure and who take umbrage at such roads being called “freeways”). And, of course, that’s where you’ll find most people that are driving from one place to another. And it usually works just fine.

So why would anyone try a route other than the freeway? … Read More → "Scouting the Backroads"

When it comes to successful FPGA implementation, synthesis serves as arguably the most influential step in ensuring that design requirements are met and the product can be shipped. In many cases, design requirements refer to performance and area—the design needs to operate at a minimum frequency and it needs to fit into the selected device. Hence, designers or CAD managers looking to standardize on a synthesis tool tend to look for good out-of-the-box quality-of-results (QoR).

The criteria for selecting the right synthesis tool, however, can—and should—be involve more than this. Adequate … Read More → "Selecting the Right FPGA Synthesis Tool"