Eleventh Annual Boston Event is Part of Largest User Conference Program in EDA
MOUNTAIN VIEW, Calif., Oct. 5 /PRNewswire-FirstCall/ — Synopsys, Inc. (NASDAQ:SNPS) , a world … Read More → "Synopsys Recognizes Technical Excellence at SNUG Boston Conference"
Introduction
Altera first introduced the 180-nm CMOS-technology HardCopy® series of ASICs, with their “seamless prototyping” capabilities, in 2001. The premise behind this first-generation HardCopy ASIC product was to “harden” the look-up table (LUT) structure of the FPGA and replace the programmable switch fabric with … Read More → "WHITE PAPER – Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints"
Introduction
Altera first introduced the 180-nm CMOS-technology HardCopy® series of ASICs, with their “seamless prototyping” capabilities, in 2001. The premise behind this first-generation HardCopy ASIC product was to “harden” the look-up table (LUT) structure of the FPGA and replace the programmable switch fabric with … Read More → "WHITE PAPER – Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints"
In-design physical verification pivotal in reducing time to tapeout for advanced designs
MOUNTAIN VIEW, Calif. – September 30, 2009 – Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that the Common Platform technology alliance, a unique technology collaboration between IBM, Chartered Semiconductor Manufacturing and Samsung Electronics, has qualified IC Validator for 32-nanometer (nm) process design rule checking on Common Platform technology. Synopsys and the Common Platform companies are continuing with the collaboration to complete the qualification of IC Validator at 28nm on Common Platform technology. IC Validator, the newest … Read More → "Common Platform Alliance qualifies Synopsys IC Validator for 32-nm design rule checking"
SUNNYVALE, Calif. – September 30, 2009 – MIPS Technologies, Inc. (Nasdaq: MIPS), a leading provider of industry-standard processor architectures and cores, announced it has joined the Open Handset Alliance™, a group of more than 45 technology and mobile companies working to offer consumers a richer, less expensive, and better mobile experience. The Open Handset Alliance developed Android, the first complete, open and free mobile platform. As a member of the Open Handset Alliance, MIPS Technologies will work with other members to contribute to continued development and success of the Android platform for mobile devices.
< … Read More → "MIPS Technologies Joins the Open Handset Alliance"
San Jose, CA, September 30, 2009 – Atmel® Corporation (Nasdaq: ATML) today announced that the BitCloud(TM) ZigBee® PRO stack has been awarded ZigBee Smart Energy product certification. BitCloud Smart Energy offers utility companies a secure, proven and easy-to-use technology for wireless home area networks (HANs) by connecting in-premise devices, such as meters, thermostats and smart appliances, to each other and to wide area energy distribution and control networks. ZigBee Smart Energy enables utility companies and individual homeowners to manage energy usage, control residential peak demand and reduce overall environmental impact.
BitCloud SE is a ready-to-use framework … Read More → "Atmel Receives ZigBee Smart Energy Certification For BitCloud Software Stack"
Premier Farnell to sell Altium’s new NanoBoard 3000 series of FPGA-based development boards
SYDNEY, Sept. 29 /PRNewswire/ — Altium has appointed Premier Farnell as the web distributor for its new NanoBoard 3000 FPGA-based development board. The agreement extends to Premier Farnell’s family of global marketing and distribution services.
Altium has launched the NanoBoard 3000 to make FPGA design easier. The supplied Altium Designer software is loaded with a large library of high-quality, royalty-free, ready-to-use IP that lets engineers use every aspect of the NanoBoard 3000 without having to create any low-level logic hardware or driver software. Engineers can … Read More → "Altium and Premier Farnell Announce Distribution Agreement"
Leuven, Belgium — September 30, 2009 — IMEC and its 3D integration partners have taped-out Etna, a new 3D chip integrating a commercial DRAM chip on top of a logic IC. The new 3D stack resembles as close as possible to future commercial chips. It consists of a 25µm thick logic die on top of which a commercial DRAM is stacked using through-silicon vias (TSVs) and micro-bumps.
The 3D demonstrator mimics all aspects of the approach by stacking an advanced commercial DRAM product chip on IMEC’s proprietary CMOS logic IC. As an example, heaters are … Read More → "IMEC sets major step towards 3D integration of DRAM on logic"
Let’s just acknowledge up front that practically nothing is as unexciting for digital designers as power supply design.
All the way back to when we were wire-wrapping our TTL parts, there was absolutely no inspiration in the part of the project where we put that “+5V” on the board. Who picked 5V for those things anyway? Didn’t they know what we had available? 9V batteries – nope. 1.5V batteries – that could get us to either 4.5V or 6V – close but nope. 120V AC (in the US) – super nope! Maybe … Read More → "Riding the Rails"
A while ago we took a broad look at the status of IP, with an eye to ease of use, reuse, and interconnectability. And, in fact, it’s a complicated matter. Moreso when you get to the issue of interconnecting various kinds of IP. There are two fundamental challenges as our SoCs get more and more mind-bogglingly complex. One is how you hook all this stuff up, and the other is how you hook on to the hook-up.
Here’s … Read More → "Networks on a Chip"
