After CEO Patrick Gelsinger announced Intel Foundry Services (IFS) and Intel’s IDM 2.0 strategy, many people have said that Intel’s IFS announcement was like an old 1950s hair-dye TV commercial: Do they, or don’t they? In this case, instead of hair coloring, the question is whether Intel was really serious about becoming a true foundry. Here’s what Intel said back on March 23, 2021:

“Intel announced plans to become a major provider of U.S.– and Europe-based foundry capacity to serve the incredible global demand for semiconductor manufacturing. To deliver this vision, Intel is establishing a new standalone business unit, Intel Foundry Services (IFS), led by semiconductor industry veteran Dr. Randhir Thakur, who will report directly to Gelsinger. IFS will be differentiated from other foundry offerings with a combination of leading-edge process technology and packaging, committed capacity in the U.S. and Europe, and a world-class IP portfolio for customers, including x86 cores as well as ARM and RISC-V ecosystem IPs.”

On February 7, 2022, Intel answered this question by putting its money down to make a definitive statement. Specifically, Intel put down $1 billion to indicate just how serious it is about becoming a true semiconductor foundry. The investment takes the form of a new $1 billion fund, assembled as a collaboration between IFS and Intel Capital, to support both early-stage startups and established companies that are “building disruptive technologies” leveraging multiple ISAs – x86, Arm, and RISC-V – as part of the foundry ecosystem.

So Intel has thrown in, at least partly, with the RISC-V crowd. Quoting from the February 7 announcement:

“As the leading open-source ISA, RISC-V offers a level of scalability and customization that is unique in the industry. There is strong demand from foundry customers to support more RISC-V IP offerings. As part of the new innovation fund, Intel is planning investments and offerings that will strengthen the ecosystem and help drive further adoption of RISC-V. The fund will help disruptive RISC-V companies innovate faster through IFS by collaborating on technology co-optimization, prioritizing wafer shuttles, supporting customer designs, building development boards and software infrastructure and more.”

This statement is a direct answer to the “Do they, or don’t they?” question. Intel has explicitly said, twice now, that it is not tying the x86 processor architecture to IFS offerings, exclusively, contrary to what many people suspected. Instead, this recent announcement declares that Intel is joining forces with “leading partners” in the RISC-V ecosystem, specifically naming Andes Technology, Esperanto Technologies, SiFive, and Ventana Micro Systems.

IFS plans to offer a range of validated RISC-V IP cores to its foundry customers and will optimize this IP for Intel process technologies. The stated goal is to ensure that these RISC-V IP cores run best on IFS silicon, “from embedded to high-performance” systems.

IFS will offer RISC-V processors in three flavors:

• •         Partner products manufactured on IFS technologies
  •         RISC-V cores licensed as differentiated IP
  •         Chiplet building blocks based on RISC-V that leverage advanced packaging and high-speed chip-to-chip interfaces

Here’s what Randhir Thakur, president of Intel Foundry Services, said for the February 7 announcement:

“Intel is an innovation powerhouse, but we know that not all good ideas originate from within our four walls. Innovation thrives in open and collaborative environments. This $1 billion fund in partnership with Intel Capital – a recognized leader in venture capital investing – will marshal the full resources of Intel to drive innovation in the foundry ecosystem.”

Gelsinger is also quoted in the February 7 announcement, and I find his quote extremely interesting:

“Foundry customers are rapidly embracing a modular design approach to differentiate their products and accelerate time to market. Intel Foundry Services is well-positioned to lead this major industry inflection. With our new investment fund and open chiplet platform, we can help drive the ecosystem to develop disruptive technologies across the full spectrum of chip architectures.”

I think Gelsinger’s quote confirms that the original, monolithic version of Moore’s law is topping out. Intel’s current best hope is to stay on track with device densities by switching to a “chipletized” version of Moore’s Law. After all, doubling the number of transistors in a package can be done with a major advance in process technology, which is increasingly difficult, or by pasting two chiplets inside of an IC package. Intel’s Ponte Vecchio GPU, revealed early last year, incorporates a total of 47 chiplets manufactured with five different process nodes by Intel and TSMC. I’d call that an existence proof if ever there was one.  

The collection of four named RISC-V partners in this February 7 announcement is also really pretty interesting. Here’s a brief summary of each:

Andes Technology, Taiwan

Andes is a Founding and Premier Member of RISC-V International. The company focuses on embedded processor IP for a wide range of applications for markets including digital consumer, embedded systems, mobile, multimedia, networking, thin client, and GPS. Andes already works with several silicon foundries including CSMC in China, GlobalFoundries, HeJian Technology, SMIC, TSMC, UMC, and Vanguard International Semiconductor Corporation in Taiwan. With the addition of IFS, Andes has its foundry bases well covered around the world.

The Fact Sheet provided with Intel’s February 7 announcement says:

“Andes Technology provides leading vector solutions targeted at the high-performance accelerator market, including artificial intelligence and machine learning in applications such as data center, data processing for 5G networks, and intelligent IoT applications on the edge. Andes’ 45-series vector processor offers a wide range of vector length from 128 to 1024 bits running over 2 GHz. Andes’ complete AndeStar V5 RISC-V CPU IP line from the 25-series, 27-series and 45-series are available for IFS customers with hardware evaluation kits and software solutions for easy evaluation and integration.”

Esperanto Technologies, Mountain View, California

Esperanto has focused on hyperscaler and datacenter applications with its massively multicore ET-SoC-1 inference chip, unveiled last year at Hot Chips 33. (See “Machine Learning: Esperanto coaxes 1092 RISC-V Processors to Dance on the Head of a Pin, er Chip.”) Of the 1092 RISC-V processor cores on the ET-SoC-1 ML chip, 1088 processor cores are Esperanto’s “ET Minion” cores, which couple the 64-bit RISC-V ISA with proprietary vector and tensor instruction extensions developed specifically for ML applications. These ISA extensions support single-clock operations on floating-point vectors and tensors as large as 256 bits using 16- or 32-bit operands, and 512 bits of integer data using 8-bit operands.

Most notably, Esperanto’s ET Minion RISC-V cores operate at 0.4 volts to meet a low-power design envelope target. Getting more than 1000 processor cores to operate at that low core voltage on one die may prove to be quite a challenge for IFS, and I believe that throwing the IFS process development team curveballs like making Esperanto minion cores run on IFS processes is just what Pat Gelsinger had in mind when he made the IFS announcement. It’s his way of keeping his process engineers sharp.

The Fact Sheet provided with Intel’s February 7 announcement says:

“Esperanto will be able to assemble many different configurations of chiplets, each with over a thousand RISC-V cores, using IFS’ portfolio of IP, packaging and end-to-end silicon manufacturing and supply chain leadership.”

SiFive, San Mateo, California

SiFive claims to be the pioneer “who introduced RISC-V to the world.” Well, that might have actually been the University of California, Bekeley, but SiFive can certainly claim to have a massive RISC-V commercial footprint at this point. The company claims to have “300+ design wins with over 100 companies — including 8 of the top 10 semiconductor companies” for its broad line of RISC-V cores, ranging from embedded cores to its latest P650 processor core, which expands the company’s “Essential” family of processor cores into the high-end, multi-core application domain typically used in datacenter servers.

Although Arm cores are making inroads into servers, it’s been a slow process. Server processors based on the RISC-V architecture, including the SiFive’s P650 core, will meet similar ecosystem-related resistance from server vendors and data center architects. If any RISC-V processor cores can give the entrenched x86 architecture some real competition in the datacenter, SiFive’s high-end RISC-V cores are certainly in the running. It will be interesting to see how Intel deals with the situation if IFS produces silicon based on RISC-V cores for customers that want to enter the datacenter.

Ventana Micro Systems, Cupertino, California

Ventana Micro Systems joined RISC-V International’s Board of Directors in early December of 2021. Its Web site says the company is focused on chiplet-based productization, which differentiates Ventana from the other companies in the IFS announcement and falls in line with the third bullet in IFS’s expected RISC-V offerings. The company intends to support the creation of flexible, multi-vendor product integrations where each chiplet can target the most optimal process node. We can’t wait to see how IFS handles that curve ball.

The Fact Sheet provided with Intel’s February 7 announcement says:

“Ventana will offer a scalable, highly customizable compute platform that combines its high-performance multi-core chiplets with an IO Hub manufactured by IFS, and leverages IFS’ portfolio of connectivity IP, packaging, and supply chain leadership. The platform will support the full range of high-performance applications including: data center, AI/ML accelerators, IPU/DPU, Networking, Storage, Security, Automotive and 5G/edge. Additionally, Ventana will offer its data center-class cores as IP on IFS’ cutting-edge manufacturing process for integration into customer platforms.”

As of yet, the Ventana website lists no actual products, so we’ll have to wait until things are more fully developed with this company to see what they bring to the IFS party. Perhaps Ventana’s share of the joint IFS/Intel Capital investment will hasten these developments.

Note: By an odd coincidence, on the day following Intel’s announcement, Nvidia and SoftBank announced that they were terminating the sale of Arm to Nvidia, due to “significant regulatory challenges preventing the consummation of the transaction, despite good faith efforts by the parties.” Arm will now start preparing for a public offering.