Microprocessor vendors have used a number of industry events to reveal technical details of their latest creations, but the Hot Chips conference in Silicon Valley remains the premiere venue for such disclosures. Hot Chips 2023 will be held August 27 to 29 in Dinkelspiel Auditorium on the Stanford University campus in Palo Alto, California. That’s right, after a 2-year hiatus, Hot Chips is again a live and in-person event, but the organizers are keeping the virtual attendance format as well, so you need not journey to Stanford to watch the presentations. However, if you want to launch those barbed questions at the presenters from the live audience or fully reap the benefits of belly-to-belly networking during this multi-day event, then you’ll want to be there in person.
As usual, the program committees have sifted through the presentation submissions to pick the most significant titles, and they have included the regular number of weird, strange, and controversial presentations. Also, as usual, the Hot Chips program committee is tightfisted with details of the presentations, but the descriptions of talks in this article expand a bit on the titles-only agenda listings on the Hot Chips 2023 Web site. The actual presentations will be made on Monday and Tuesday, August 28 and 29, with ten tutorials presented on Day 0 – Sunday, August 27 – before the main event. You’ll find the advance program here.
Presentations on Hot Chips 2023 Day 1, August 28, start with two talks about in-memory processing. SK hynix’s Yongkee Kwon will introduce the company’s domain-specific memory (DSM), which uses commodity DRAM in a unique operating mode that enables memory-centric computing for Large Language Models (LLMs). A second presentation by Samsung’s Jin Hyun Kim will discuss a system-level AI cluster that employs High Bandwidth Memory (HBM) and CXL to create a high-performance, near-memory processing system for transformer-based LLMs.
The next series of talks is the first of two during Day 1 of the conference to focus on CPUs, with the usual heavyweight companies represented. Arm’s Magnus Bruce will discuss the company’s second-generation V-series platform, Neoverse V2, which is based on the Armv9 architecture and prioritizes single-thread performance required by HPC and AI/ML workloads. This Hot Chips talk is Arm’s first public disclosure of the Neoverse V2 core micro-architecture.
During the second presentation in this series of talks, AMD’s Kai Troester will cover the company’s Zen 4 processor core, which supports AVX512 vector extensions and extensions for machine learning and security. He will also discuss the core’s instructions-per-clock (IPC) and energy efficiency improvements over prior generations of the company’s extremely successful Zen core. The talk will also reveal previously undisclosed features of the Genoa server processor, which is based on the Zen 4 core.
Ventana’s Greg Favor will give the third presentation in the CPU series. He will discuss the Veyron V1, which is Ventana’s first-generation 64-bit RISC-V CPU. Ventana will offer the Veyron V1 as a chiplet and as IP. Apparently, the company cribbed the name from the Bugatti supercar, which is now more than two decades old. The Super Sport version of the Bugatti Veyron has a top speed of nearly 270 mph, but the car has an electronic governor to limit its top speed to 258 mph so that the tires do not self-destruct. The overloaded name suggests that the Ventana Veyron V1 CPU may be similarly peppy.
Intel’s Don Soltis starts the session on platforms with a talk that covers the architecture and power management of the company’s upcoming Meteor Lake platform, a 14th-generation CPU family for mobile applications. Intel has already revealed that Meteor Lake is a multi-die x86 design with a mix of performance (P) CPU cores and efficiency (E) CPU cores.
During the following session and finishing up the presentations for the day, SiFive’s Brad Burgess will discuss the company’s Performance 870 series RISC-V processors, which add a new out-of-order (OOO) implementation for the RISC-V “V” vector extensions. SiFive is no stranger to OOO processors, having introduced one or two such processors prior to the Performance 870.
Processors are not the only hot chips to appear on the Hot Chips 2023 presentation roster. You’ll find many unusual architectural discussions and disclosures taking place during the conference’s second day. Although it’s already been disclosed and gotten a fair amount of press coverage, Cerebras’ Sean Lie will provide additional details about the company’s wafer-sized AI processor, the Wafer Scale Engine (WSE), which boasts a total of 2.6 trillion transistors distributed among 850,000 AI-optimized cores and 40 Gbytes of on-chip SRAM. A system based on one WSE consumes 23 kilowatts, so even a discussion of power distribution and cooling for this behemoth should prove fascinating.
Nvidia acquired Mellanox for its advanced networking capabilities, embodied in the company’s multiple generations of BlueField programmable networking ASICs. During the Hot Chips 2023 Interconnects session, Nvidia’s Omer Shabtai plans to discuss how the latest Bluefield developments go beyond programmability to fungibility by combining its Spectrum-4 Ethernet switch with BlueField DPUs (data processing units). And if you don’t know what that all means, you’d best attend the Interconnects session on Day 2 of the Hot Chips 2023 conference and find out.
During that same Interconnects session, Intel’s Joshua Fryman will discuss the use of the company’s co-packaged optics to build a 1-Tbps (in each direction) network capable of handling small messages with aplomb. Intel calls this design the first direct, mesh-to-mesh photonic fabric. Once again, if you don’t know what that means, you’d best attend the Interconnects session and find out.
Of course, no computing conference worth its salt these days can skip the major innovations occurring around artificial intelligence and machine learning (AI/ML), and Hot Chips 2023 is no exception. The ML-Inference session is scheduled for the afternoon of Day 2. During this session, Qualcomm’s Eric Mahurin will discuss the architecture and target markets for the company’s Hexagon Tensor Processor, which first appeared in the Snapdragon 888 Mobile Platform and Qualcomm’s Cloud AI 100. Snapdragon 8 Gen2 incorporates the third generation of this tensor processor, which adds support for matrix operations commonly used in Deep Neural Networks to the Snapdragon platforms.
At the end of Day 2, in the conference’s caboose session, organizers seem to have mashed up FPGAs and cooling. I guess there weren’t enough FPGA paper proposals to make a session. Call it the potpourri session, perhaps. AMD and Intel will both discuss their latest (or near-latest) FPGAs. AMD’s Dinesh Gaitonde will be discussing the company’s broadening use of chiplets to make large FPGAs. Long before AMD bought Xilinx, this technology first appeared back in 2011 when Xilinx announced the Virtex-7 2000T FPGA, a 2-Mgate device built from four FPGA semiconductor tiles bonded to a silicon interposer. The Virtex-7 2000T FPGA marked the first use of TSMC’s CoWoS interposer-and-chiplet technology. Now, AMD has traveled five generations along the learning curve with this packaging technology, which has become essential to the continued development of bigger and more diverse FPGAs. AMD’s presentation will cover the latest frontiers for FPGAs and chiplets, from the company’s perspective.
During this same session, Intel’s Benjamin Esposito will discuss the company’s Agilex-9 Direct RF FPGAs, which have integrated, 64-Gsamples/sec A/D and D/A converters along with the Agilex FPGA fabric. Intel announced these FPGAs late last year, but perhaps the company is willing to part with additional technical information at Hot Chips 2023. You’ll need to attend to find out.
