Metastability is a phenomenon that can cause system failure in digital devices when a signal is transferred between circuitry in unrelated or asynchronous clock domains. This paper describes metastability in FPGAs, explains why the phenomenon occurs, and discusses how it causes design failures. The MTBF due to metastability indicates whether steps should be taken to reduce the chance of such failures. This paper explains how MTBF is calculated, and how both vendors and designers can increase it.
Author: Jennifer Stephenson, Applications Engineer, Member of Technical Staff, Software Applications Engineering
Ms. Stephenson works closely with EDA synthesis vendors and Altera’s software engineering, technical support, and sales organizations to understand strategic customer needs and improve the customer experience. Jennifer holds a B.A.Sc. degree in Electrical Engineering from the University of Toronto.
