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Embedded Signal Processing Capabilities of the LatticeECP3 sysDSP Block

Enhanced DSP Capabilities

The success of the LatticeECP2M family in addressing the 2G/3G wireless arena, coupled with discussions with customers, has served to drive the architectural improvements made in the LatticeECP3 DSP block. Several key points have been addressed. First and foremost, backward compatibility has been maintained with the current LatticeECP2/M DSP. There is also finer control of the DSP functions, which increases overall DSP block performance. The following sections of this white paper will outline each targeted feature, and how the LatticeECP3 family provides superb overall performance for many signal processing applications.

Figure 1 below provides a high level diagram of the major data flow differences between the LatticeECP2/M and LatticeECP3 DSP block.

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