feature article
Subscribe Now

Entering the Spin Zone

A Closer Look at MRAMs

Some time back we took a brief look at MRAM technology, mostly from the standpoint of contrasting it with FRAMs, triggered by a specific paper regarding an MRAM-based flip-flop. That was a somewhat unusual implementation of the MRAM concept that happened to provide a quick technology contrast but didn’t really get to the heart of what’s going on with MRAMs. So we’re going to dive deeper here in the hopes that spin technology ends up meaning more than technology that causes my head to spin. Something at which it excels.

First of all, let’s review why this even matters. MRAM has the potential to challenge SRAMs, DRAMs and the various FLASH-like technologies. The hope is that it be fast, inexpensive, and non-volatile, with infinite endurance. It could be used in stand-alone memories or for embedded memories in SoCs. The promise of MRAM has attracted a variety of participants over the last decade, but it’s taken longer to come to fruition than many hoped, causing some companies to fall back and stop development.

But work continues, and several flavors of MRAM exist, either in production or in research (or somewhere between). Understanding the different kinds requires us to go back to some fundamentals and depart from the more comfortable IC concepts. And bear in mind that this is an area of research; there are aspects of this technology that aren’t yet fully explained by physical models, so people way smarter than I are still scratching their heads. Which makes me feel better. Some.

The Many Manifestations of Magnetic Materials

When I grew up, magnetism was simple. Some materials had it (iron); some didn’t. In fact, most didn’t. Magnetic materials could be magnetized; non-magnetic materials couldn’t be. A nice, clean, simple world.

Well, it turns out that materials aren’t quite so straightforward. Within the “magnetic” category are several variants. The most common or familiar would more accurately be called “ferromagnetic.” In a ferromagnetic material, it’s possible to permanently align all the atomic magnetic domains by applying an external field. In other words, your basic magnet.

But there is also something called “antiferromagnetism.” In this case, the atomic rows alternate their magnetic polarities. In the big picture, because the two polarities occur in the same numbers (plus or minus a row) with the same strength, there is no net magnetic character to the material. But, right up against the edge, a ferromagnetic material can feel the effect of the closest row of atoms in an antiferromagnetic material. This happens only over an extremely short distance, but, then again, our entire discussion deals with dimensions of a few nanometers – we’re talking atomic scale. This ability to detect the edge of an antiferromagnetic material will actually prove useful further below.

For completeness, there’s also something in between ferromagnetic and antiferromagnetic – “ferrimagnetic.” This is like antiferromagnetic, except that one of the alternating magnetic directions is stronger than the other, and so the material exhibits a slight net field since there isn’t complete cancellation.

All of these materials have some temperature above which they’re no longer… whatever kind of magnetic they are. At that point they become “paramagnetic,” meaning that, while they still may exhibit some weak response to an external field, they can’t hold that field; essentially, all the clean, stable alignments in the atomic lattice disappear.

Do you read me?

Now that we have our different kinds of magnetic stuff under our belts, we come to the critical phenomenon that makes all of this work. It turns out that – and here’s where things start to veer into the realm of the weird, as things quantum are wont to do – electrons have spin, which can be either up or down. This gives electrons a magnetic polarity. And, in fact, denizens of this domain divide a current of electrons into two “channels”: one with up spin, one with down spin.

This means that a current can be polarized by a magnet. A current flowing through a magnet will let electrons of one spin through more easily than electrons of the opposite spin. The exact mechanism at work here seems to be the topic of continuing study, depending on material (Deflected electrons? Repolarized electrons, sapping energy? Different effective electron masses depending on whether s-like or pd-like? Gah! Somebody get me outa here!). But the bottom line is: if you run electrons through one magnet, you’ll polarize the current; that is, one channel will flow through more easily than the other channel. If you then run the polarized current through a second magnet of the same alignment as the first, the easy channel will still flow easily, while the hard channel will still have a hard time. But if you run the polarized current through a second oppositely-aligned magnet, it now makes life difficult for what was the easy channel.

So let’s look at that again: running the current through two magnets of the same alignment screws up one of the two channels; running the current through two magnets of opposite alignment screws up both channels (“screws up” being a semi-technical approximation that I can wrap my head around). Two channels screwed up create more resistance than just one channel screwed up. As a result, the resistance of the whole shebang is higher when the magnets are counter-aligned.

Because the spin of the electrons relative to the layers causes the current to be throttled somewhat (loosely speaking), this structure is referred to as a “spin valve.” The difference in resistance can be in the tens of percent range, which, to the first discoverers, was giant. And so this phenomenon was dubbed Giant Magnetoresistivity, or GMR. Seriously.

As an aside, certain materials have been found to have a similar, but distinct, effect, with the resistance difference being a couple orders of magnitude or so. This is even more giant. Given that “giant” was already taken, they needed an even bigger word, so this effect is called “Colossal Magnetoresistivity” or CMR. I’m not making this up. There is not yet any physical model accounting for CMR; it’s way out in the weeds at this point. And that’s where we’ll leave it.

A hard cell

Back in the world of the merely giant, we have two different resistances depending on the mutual alignment of the magnets, so we have a way of storing 1s and 0s – if we can control this. To build this cell, we start with one magnet of fixed polarity – the so-called “pinned” or “reference” layer – and let the other magnet be adjustable – the so-called “free” layer. This is all built up into what’s called a “nano-pillar,” a stack of materials consisting primarily of these two ferromagnetic layers a few nanometers thick, separated by another layer we’ll talk about in a minute. Research dudes do things like play with the pillar shape and restrict where the current flows to engineer the nature of the fields, but that’s getting in over our – ok, my – head.

In order to help stabilize the field of the pinned layer, an antiferromagnetic layer is put right underneath it. That layer isn’t magnetic itself, but right at the edge, if you recall, the boundary layer does have a small magnetic influence on the ferroelectric layer that it touches, which helps “bias” the pinned field. So now our stack consists of, from the bottom to the top, the antiferromagnetic layer, the pinned ferromagnetic layer, the layer we haven’t discussed yet, and the free ferromagnetic layer. There are other capping layers and such, but those just help deal with such trivial matters as manufacturability or reliability; we won’t worry about those. The specific materials used for these stacks are also left as an exercise for the reader*.

So now we have this vertical stack of materials, and by running a current through it and sensing the resistance, we can determine whether the stack is polarized as a 1 or a 0. That is, we can read the contents of the cell.

There’s one detail I have kept avoiding: we’ve got two ferromagnetic layers, one pinned, one free, separated by… something. The earliest implementations have metal in there; this whole stack is then simply a complicated wire. When you see a generic reference to GMR technology, this is probably what it refers to. It is very commonly used in modern disk drives. But the currents involved are high – much higher than we would like for an SoC or silicon memory implementation.

For non-disk-platter use, instead of sandwiching metal between the magnets, a thin insulator can be used, and the current tunnels through the insulator. This brings the current down to a manageable level. Such a configuration is referred to as Tunnel Magnetoresistance (TMR). The name TMR is often used as a contrast to GMR, but, in fact, both exploit the GMR phenomenon. It’s just a matter of what goes between the magnets: conductor or insulator.

This tunneling element is referred to as a “magnetic tunnel junction,” or MTJ. It also has a role in disk drives: a single MTJ is used in the read head. But it’s one thing to put a single MTJ on a read head; it’s quite another to make a billion or two on a chip. The challenge of making MRAM technology work is creating a large array of writeable, readable MTJs that can be reliably manufactured.

Write when you get work

And that brings us to the final critical point: how do you switch the polarity of the free layer? Which is to ask, how do you write to the cell? We’ll focus on TMR since that’s what’s relevant to ICs. While there have been a number of interesting geometries for creating a magnetic field (one of which was mentioned in the prior article), there are two standard ways of switching the free layer, one of which is proven and in production and one of which is still the subject of research.

The proven way of switching the free magnet is to have an array of wires that cross above (or below, or surrounding) each MTJ. Each vertical nano-pillar can then be addressed by picking the right row and column wires and running a current through both. A current through a wire creates a magnetic field around it. If each of the crossing wires has a current just over half of what’s needed to switch the magnet, then only at the point right above the desired nano-pillar, where the wires cross, will their fields combine into an overall field large enough to flip the free layer. This is referred to as field-induced magnetic switching (FIMS) because you’re using the generated field to do the switching.

The alternative switching technology uses a scheme that goes by the rather exotic-sounding name of spin-torque transfer (STT). Instead of switching by means of current in a grid of horizontal row and column wires, switching happens by means of current running vertically through the cell itself. The idea is that by running enough polarized current, you can transfer the spin torque of those electrons to the free layer as they pass through, flipping its magnetic polarity. That’s probably a gross over-simplification, and some magnetician may be heaving all over this right now, but that’s in essence what’s happening. This is sometimes referred to as current-induced magnetic switching, or CIMS, as contrasted with FIMS, although STT is the more common nomer.

While STT is what everyone is gunning for in the long term, it doesn’t appear to be ready for prime time yet; estimates of true production-worthy material range from 2010 to 2012. Issues to be resolved include such obvious things as reducing the amount of current needed for programming and such subtle things as speeding up programming by reducing the amount of precession or wobbling the magnetic moments do before they settle down after switching. I will allow my own head to stop wobbling for a while before attempting to dive in yet deeper.

Sit down, I didn’t call on you

All of this is theoretically nice, but life – especially in the quantum world – is not clean or precise. For example, not all cells will require exactly the same field to switch. So you need to provide enough of a field to ensure the stubborn ones will flip, but that means that you might accidentally flip some easy cells you didn’t mean to write to. The amount of disturb margin has been an issue for first-generation MRAM.

As pointed out by Barry Hoberman, who handles business development for Crocus Technology, there are three critical aspects that must be managed for this technology really to be useful: stability, selectivity, and scalability. Each cell must be relatively impervious to distractions that might coax it to switch state when it shouldn’t; you need to be able to sleep nights knowing that when you select a cell to write, only that cell will be written; and you want to have a cell that can be used in a scalable array and that can be scaled with future technologies.

One of the keys to all of these boils down to is making sure only the right magnets get flipped. How easy it is to get a magnet to flip is referred to as its “coercivity.” You want low coercivity when reading so it doesn’t get duped into flipping when it shouldn’t, but high coercivity when writing – if it’s the cell you want to write. The stability and selectivity of either FIMS or STT can be improved by the use of thermally-assisted switching (TAS), also called Magneto-Thermal MRAM. This takes advantage of the fact that ferromagnetic materials can be engineered to have a specific “blocking temperature” where coercivity changes dramatically. Below the blocking temperature, coercivity is low; above the blocking temperature, coercivity is high.

This means that if you engineer the materials correctly, you can have robust, rock-hard cells at operating temperatures, but softer, more pliable cells at some higher temperature. You can self-heat the cell using current, and the blocking temperature can be placed safely above operating level, yet low enough so that it doesn’t require a huge heating current; Crocus is targeting around 150 °C.

For a FIMS cell, which uses the row/column lines, you can add a select transistor to the MTJ and pull a current when writing. The selected cell will be heated, reducing the field required to write to it, thus reducing the current needed in the row and column wires. Unselected cells will be protected two ways: they’re not being heated, so their coercivity is low, and a smaller field makes accidental flipping even less likely.

While this clearly helps stability and selectivity, it also helps with process scaling. Stray fields can become more of an issue with more advanced process nodes; a more robust cell makes that less of an issue. In addition, various second-order reliability issues related to current density start cropping up; they are mitigated due to the lower currents.

TAS can theoretically also be used with SST, which already has a selectable current flowing through it for the specific purpose of writing. It’s not clear that any work has been done in that area, however, since most effort is dedicated to getting the STT mechanism working first.

Who’s on board?

So, in summary, we have two technologies: FIMS and STT/CIMS, with TAS available on the side for either one. Who is doing what with this stuff? A scan of public information and some decoding show:

  • NVE licensed its technology to Motorola, Honeywell, and Cypress (no longer doing MRAM).

  • Freescale has been selling FIMS MRAM based on technology licensed and reworked by Motorola from NVE; it has spun off this activity into a separate company called Everspin. They are also working on STT MRAM.

  • Honeywell has a radiation-hardened MRAM licensed from NVE.

  • Crocus is a startup working on FIMS+TAS, with long-term work on STT technology.

  • Grandis has developed and licensed STT technology for use by DARPA, Hynix, and Renesas.

  • Renesas licensed technology from Grandis in 2005; devices are expected to be commercialized over the next year or two.

  • Hynix announced in April 2008 that they were licensing Grandis’ technology. In June they also announced a partnership with Samsung for STT MRAM and other technologies.

  • Micromem is working on III-V semiconductor MRAM for mil/aero applications.

  • Spin Transfer Technologies was founded by Allied Minds and New York University to develop STT MRAM.

  • Northern Lights sells something they call EMRAM (or eEMRAM when embedded). It’s hard to tell from their information whether this is the same as MRAM, since they don’t discuss their technology details on their website.

  • There are a number of other companies that show up here and there in the literature – IBM in partnership with Infineon, Intel, and Sony – but there has been no recent news, and the results of a search for MRAM on their sites yields no product information (or nothing at all).

So there you have it: a whirlwind tour of MRAM technology and a diversion from the world of electronics into the world of magnetics. If this stuff can really deliver on its promise, then the architecture of SoCs can be significantly rethought as the old SRAM/NV-ROM model is rendered obsolete.

And, in the limit, it can challenge DRAM, for whom life is only getting more difficult as its capacitors reach for the sky. But that’s a story for another article.

*If you do check up on materials, there are papers referencing, without explanation, something called “Py”, which was surprisingly hard to track down. It’s “permalloy.” You’re welcome.

General link: MRAM information

Leave a Reply

featured blogs
Nov 22, 2024
We're providing every session and keynote from Works With 2024 on-demand. It's the only place wireless IoT developers can access hands-on training for free....
Nov 22, 2024
I just saw a video on YouTube'”it's a few very funny minutes from a show by an engineer who transitioned into being a comedian...

featured video

Introducing FPGAi – Innovations Unlocked by AI-enabled FPGAs

Sponsored by Intel

Altera Innovators Day presentation by Ilya Ganusov showing the advantages of FPGAs for implementing AI-based Systems. See additional videos on AI and other Altera Innovators Day in Altera’s YouTube channel playlists.

Learn more about FPGAs for Artificial Intelligence here

featured paper

Quantized Neural Networks for FPGA Inference

Sponsored by Intel

Implementing a low precision network in FPGA hardware for efficient inferencing provides numerous advantages when it comes to meeting demanding specifications. The increased flexibility allows optimization of throughput, overall power consumption, resource usage, device size, TOPs/watt, and deterministic latency. These are important benefits where scaling and efficiency are inherent requirements of the application.

Click to read more

featured chalk talk

Selecting the perfect Infineon TRENCHSTOP™ IGBT7 in Industrial Applications
Sponsored by Mouser Electronics and Infineon
In this episode of Chalk Talk, Jason Foster from Infineon and Amelia Dalton explore the characteristics and tradeoffs with IGBTs. They also investigate the benefits that Infineon’s 1200 V TRENCHSTOP™ IGBT7 H7&S7 650 V TRENCHSTOP™ IGBT7 H7&T7 bring to the these kind of designs, and how Infineon is furthering innovation in the world of Insulated-gate bipolar transistors.
Nov 18, 2024
5,807 views