OK, we have to come clean right away. In introducing their new 99 cent FPGAs (yep, not a typo), Actel never claimed that they were zero dollars or zero power. FPGA Journal is adding that part via a superpower we call “editorial license.” Here’s how it works – some of Actel’s competitors have already called their competing parts “Zero Power” because they have a static power consumption of less than a milliwatt. Apparently, the old ammeters would just show zero when the current dropped into the microamps, and some enterprising marketing dudes decided that was zero enough for them. We have explained all this in previous articles, of course, so here we’ll just say that it amounts to rounding down. Since Actel’s devices are even lower power than the “Zero Power” competitors, that one isn’t much of a leap. Also, as long as we’re rounding down, a 99-cent device would be zero dollars, right? Q.E.D.
These new “not actually free but pretty darn close” devices are being marketed as FPGAs because, hey, they’re actually FPGAs. Before you go saying “Uh, that’s obvious!” let us point out that the density and cost range of these FPGAs is comparable to many high-end CPLDs, and that at least one competitor (Altera) markets a device family as a CPLD even though it has an FPGA-like LUT structure. In fact, the FPGA/CPLD boundary has been growing increasingly fuzzy in recent times – which means we need to consider both categories when we go to design-in a device in this density range.
Actel’s newly announced 99-cent FPGAs are additions to their existing ProASIC3 and Igloo families. Actel is all about low-power devices these days, and they’ve got three separate flash-based families of low-power, low-cost FPGAs to prove it. Each family offers a different trade-off point in the power/performance continuum. ProASIC3 is the highest performance (and therefore highest power) family. Igloo offers the lowest power consumption, with a performance penalty. And the newly-announced ProASIC3L is a compromise point between the two. Generally, you’ll want to pick the family with the least performance that still meets meet your functional requirements. That way, you’ll be using the lowest-power device available. Next, pick the smallest device that will still hold your design. In some cases, you don’t need to leave room for future expansion because larger FPGAs are available in the same package and, later on, you can swap to a bigger device but still stick with your package footprint so you don’t have to re-design your board.
Actel is targeting a number of rapid-growth (for programmable logic) market segments including consumer, industrial, automotive, and communications. Within those segments, they’re looking at power, cost, and space-constrained applications like handheld devices where the advantages of their flash-based devices shine. Flash-based FPGAs offer a number of unique benefits including live-at-power-up operation (with no external configuration circuitry required), small footprint, low total system cost, and very low power consumption (particularly static power, where competing SRAM-based FPGAs have a disadvantage because of the power required to retain their configuration.)
Actel compares their Igloo family’s static power consumption (weighing in at tens of microwatts) with competitors’ offerings that are typically in the tens of milliwatts. For battery-powered applications, this difference is enormous. When compared to CPLDs (even “zero power” ones), Actel claims to have a static power advantage of around 10x. Actel says the new 99-cent devices are about 15K “system gates” and have a density comparable to 128-macrocell CPLDs. The Igloo version of that device has a static power consumption of only 5µW. Designing Igloo devices to take advantage of that low static power is very easy as well, because of the “Flash*Freeze” mode that allows the device to be put into ultra-low power consumption by toggling a single pin.
Dynamic power is not specified but will likely be extremely competitive. Dynamic power specifications are almost impossible to give because dynamic power varies depending on a number of factors like frequency, design size, number and type of clock domains, and a number of design factors. Flash-based FPGAs generally acquit themselves very nicely on dynamic power consumption, however, albeit not with the dominance they show on the static power front.
Specifically, the two new devices are called AGL015 (Igloo) and A3P015 (ProASIC3). Each of these devices is rated at 15K “system gates.” The AP3P015 (ProASIC3) version operates at 1.5V, and the Igloo version offers both 1.2V and 1.5V operation. If you can get by with lower performance, you can save a lot of power by turning the power supply down to 1.2. The Igloo device is rated at an Fmax of 250MHz, and the ProASIC3 device can reach 350MHz. These new 99-cent versions are missing a few things you’ll find in their bigger siblings, including RAM and PLLs. They do have 1Kb of non-volatile Flash ROM, however, and there are a lot of fun things you can do with that, including serialization, encryption keys, and controlling customizable services. The new devices each have 2 I/O banks and can give 49 user pins in an 8X8mm QN68 package.
As far as packaging, the QN68 is interesting because it allows much simpler (meaning cheaper) PCB design, and the 8X8 is a very small footprint package. The penalty, however, is that none of the larger family members are available in this package, so if you plop one of these babies down on your board, you’re stuck with the FPGA size you started with.
If you’re comparing with CPLDs, these devices can deliver the same capability in a much smaller die area – which means lower cost. It also means it will fit in a much smaller package – saving you board real-estate. If you’re comparing with FPGAs, these are some of the smallest, certainly the cheapest, and probably the lowest power devices available. Unless your application calls for features or performance that these chips can’t deliver, they’re an excellent choice – widening the envelope of FPGA applicability even more and bringing the value of programmability into the demanding high-volume mobile device market.
