Power, Price, and Performance – in the old days, every new click of Moore’s law gave us all three, automatically. Shrink the gates and you can fit more of ‘em in the same space, they switch faster, and you can drop your supply voltage, saving power. As we passed down into double-digit nanometers, however, we started having to compromise more. Now, we have to pick just two out of the three “Ps” of Moore’s Law.
Altera is perfectly content with that state of affairs, as they have just launched their new Cyclone III low-cost FPGA family – the first low-cost FPGA at the 65nm process node. They’ve chosen the “Power” and “Price” Ps from the menu, and packed as much functionality as they can onto the new, cost-optimized family. The density range for Cyclone III covers new turf for low-cost FPGAs, and the power consumption is even lower for a given amount of logic than the company’s high-end 65nm Stratix III family.
The battle for low-cost FPGA supremacy has been heating up steadily for the past two or three years. The number and diversity of entrants in this category is far larger than in any other segment in programmable logic. Altera, Xilinx, Lattice, Actel, and QuickLogic all offer devices that could be categorized as low-cost FPGA. Several of them offer multiple families. There are volatile (SRAM) devices, non-volatile (antifuse and flash) devices, and hybrid (SRAM with built-in configuration flash) devices. Cyclone III falls into the first category (volatile SRAM FPGAs) along with Xilinx’s Spartan-3 family and Lattice’s ECP2 family.
Both the Xilinx and Lattice low-cost families are still at the 90nm node, along with Altera’s previous-generation Cyclone II. What does 65nm bring to low-cost FPGA? You’ll get higher density (or lower cost for the same density) and lower power operation as the primary benefits.
On the density front, the new family ranges up to 120K logic elements, making it the first low-cost FPGA to break the 100K logic element barrier. Xilinx’s Spartan-3 family tops out at about 75K logic cells, and Lattice’s ECP2M weighs in with up to 95K LUTs. While the subtle differences between “logic elements” (Altera), “logic cells” (Xilinx), and “LUTs” (Lattice) are in constant dispute, it’s important to remember that the logic element count is no longer the only significant gauge of logic capacity, even on a low-cost device. Devices in this category now come with significant amounts of memory, large numbers of hard-wired multipliers, and impressive I/O resources. You’ll need to consider all of those elements in picking the best fit for your design. As far as those “other” resources go – Cyclone III will come with up to 4 Mbits of RAM, up to 288 18X18 multipliers, and up to 535 user I/Os.
Table 1. Cyclone III FPGA Overview | ||||||||||
Device | EP3C5 | EP3C10 | EP3C16 | EP3C25 | EP3C40 | EP3C55 | EP3C80 | EP3C120 | ||
---|---|---|---|---|---|---|---|---|---|---|
Logic Elements | 5,136 | 10,320 | 15,408 | 24,624 | 39,600 | 55,856 | 81,264 | 119,088 | ||
M9K Embedded Memory Blocks (1) | 46 | 46 | 56 | 66 | 126 | 260 | 305 | 432 | ||
Total RAM (Kbits) | 414 | 414 | 504 | 594 | 1,134 | 2,340 | 2,745 | 3,888 | ||
Embedded 18-bit x 18-bit Multipliers |
23 | 23 | 56 | 66 | 126 | 156 | 244 | 288 | ||
PLLs | 2 | 2 | 4 | 4 | 4 | 4 | 4 | 4 | ||
Maximum User I/O Pins | 182 | 182 | 346 | 215 | 535 | 377 | 429 | 531 | ||
Differential Channels | 70 | 70 | 140 | 83 | 227 | 163 | 181 | 233 | ||
Availability |
Q3 2007 | Q3 2007 | Q4 2007 | Now | Q4 2007 | Q4 2007 | Q4 2007 | Q2 2007 |
Note to Table 1:
- M9K memory blocks offer 9,216 bits per block (including parity bits)
Altera has chosen an aggressive low-power process technology for Cyclone III – TSMC’s 65nm LP (low-power) process, which includes low-K dielectric, triple oxide, nine layers of metal (all copper) and other power-sparing process goodies. These have the net effect of reducing static power consumption significantly – less than 0.5W static at 120K LEs compared with Stratix III’s “under 1.5W” static for the same density.
To make the full comparison with their 90nm Cyclone II family clear – Altera is announcing a set of multipliers – 1.7X more logic, 3.5X more memory, 2X more multipliers, 20% lower cost per logic element, and 50% lower power consumption. Additionally, they have added support for lower-cost commodity flash for configuration and higher memory interface speeds for external RAM.
Performance is not the highlight of low-cost FPGAs. Altera doesn’t quote any specific Fmax spec (almost nobody does these days because Fmax is highly design-dependent), but they say that it is “on par” with Cyclone II. They cite an example of 166MHz as “typical system performance,” which means that Cyclone III is certainly no dog when it comes to toggle rates. With the gap between low-cost and high-performance FPGAs closing with each new product announcement, however, the last big differentiators are probably frequency and I/O capability. You most likely won’t ever find low-cost FPGAs competing with their more expensive brethren on these final differentiating specs.
Cyclone III includes many capabilities that are domain-targeted for what the company sees as the big markets for low-cost FPGAs, such as cost-sensitive, higher-volume applications where large amounts of processing power are required. Areas like video surveillance, portable medical devices, and software-defined radio are potential fits for Cyclone III’s combination of features and cost, in addition to more traditional low-cost FPGA markets like flat panel displays. The abundance of DSP-friendly multipliers, large helpings of memory, and carefully chosen I/O and memory support make the new family an excellent choice for these applications.
Altera is already providing design tool support for the new family in Quartus II version 7.0, and a host of third-party vendors have announced their support as well. Aldec, Altium, Mentor Graphics, Synplicity, and Zuken have all announced some level of support for the new family. Altera has been investing heavily in low-power design tools over the past few releases, and many of their low-power design features in Quartus support Cyclone III. The new family does not, however, share the architectural power-saving features of Stratix III – its low static power numbers come primarily from the aforementioned process changes. Altera does support the full Cyclone III density range with their free tool suite.
Altera says that over 250 early-access customers have already been designing-in Cyclone III and that their early-access program for the new family began about six months ago. Given Altera’s recent record for production delivery of newly announced products, we’d expect to see Cyclone III in volume according to the company’s predicted schedule: production-qualified shipping in Q3 2007. Their exemplar pricing of “as low as $4” is based on the 3C5 at 500,000 unit volumes in mid-2008.
Given the volatile nature of the rapidly-expanding low-cost FPGA market, we’d expect Cyclone III to cause a bit of a shakeup. Other vendors will almost certainly be announcing their own 65nm low-cost entries, but for now, Cyclone III is the big fish of little FPGAs.